An Improved Algorithm of Stream Cipher Based on LFSR

Feng, Lifeng; Fang, Yingjue

doi:10.1109/wicom.2012.6478414

Cited by 2 publications

(1 citation statement)

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“…On the other hand, cooling systems cannot improve as fast as the power consumption increases. Therefore in the very close future chips are expected to have limitations of cooling system and solving this problem will be expensive and inefficient [2].…”

Section: Introductionmentioning

confidence: 99%

Design and Analysis of CMOS Linear Feedback Shift Registers for Low Power Application

Rosly

Reaz

Kamal

et al. 2016

AMM

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Chip manufacturing technologies have been a key to the growth in all electronics devices over the past decade, bringing added convenience and accessibility through advantages in cost, size, and power consumption. Using recent CMOS technology, LFSR is implemented until layout level which develops low power application. One of the most frequent uses of a LFSR inside a FPGA is as a counter. Using a LFSR instead of a binary counter can increase the clock rate considerably due to the low routing resource required to produce the next state logic. This paper explores the LFSR using different architecture in a 0.18μm CMOS technology. There are 3 type architecture implemented into LFSR which is NAND gates, pass transistor and transmission gates. Those LFSR are compare in term of CMOS layout, hardware implementation and power consumption using Mentor Graphics tools. Thus, it provides analysis of LFSR for low power application in CMOS VLSI.

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Section: Introductionmentioning

confidence: 99%