An high voltage CMOS voltage regulator for automotive alternators with programmable functionalities and full reverse polarity capability

Fanucci,; Pasetti,; D'Abramo,; Serventi,; Tinfena,; Chassard,; Labiste,; Tisserand, V.

doi:10.1109/date.2010.5457150

Cited by 10 publications

(4 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It integrates on the same die a power stage to drive rotor coil, similar to the one described in [21], different I/O interfaces, a power management block and a small digital part that manages a serial communication with an external digital core, implemented on an FPGA. The FPGA solution has been chosen to increase the flexibility, like in [22].…”

Section: Autochip1mentioning

confidence: 99%

“…The regulation loop is done by monitoring the BPA voltage defining the Pulse width modulator (PWM) signal duty cycle by comparison with a reference voltage. In order to tolerate the reverse bias voltage conditions on the battery side, a bulk driver circuit is used to avoid the parasitic diode conduction under the reverse bias condition [22]. As shown in Figure 10, in normal operation the voltage of PMOS source node (BP A) is higher than the drain node voltage, hence, the bulk driver switch is turned on connecting the bulk and the source of the PMOS switch.…”

Section: Autochip1mentioning

confidence: 99%

See 1 more Smart Citation

Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications

Moursy

Zeng

Khalil

et al. 2017

IEEE Trans. Power Electron.

View full text Add to dashboard Cite

Abstract-This paper presents a methodology to analyze the substrate noise coupling and reduce their effects in smart power integrated circuits. This methodology considers the propagation of minority carriers in the substrate. Hence, it models the lateral bipolar junction transistors that are layout dependent and are not modeled in conventional substrate extraction tools. It allows the designer to simulate substrate currents and check their effects on circuits functionality. The proposed methodology employs a dedicated tool for substrate network generation referred to as AUTOMICS. We applied the methodology on two test cases. The first case is a DC-DC buck converter chip fabricated with a 0.35 µm HV-CMOS technology. The DC coupling current between the switches and the bandgap circuit is simulated and verified with measurements. The second test case is an automotive industrial chip that has a latch-up failure due to substrate coupling. In transient simulations, the failure has been reproduced as in measurements. This highlights the stronghold of the methodology since it can be used to prevent this type of failures before fabrication. The proposed methodology can reduce the number of redesigns in the automotive industry. Hence, it shortens the time-to-market, improves the robustness of the design, and reduces the cost.

show abstract

Section: Autochip1mentioning

confidence: 99%

Section: Autochip1mentioning

confidence: 99%

Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications

Moursy

Zeng

Khalil

et al. 2017

IEEE Trans. Power Electron.

View full text Add to dashboard Cite

show abstract

“…These defects participate in the appearance of the impedance and the reversed polarity faults, which reduce the power supplies by the faulty generator [6][7]. Modeling the generator behavior in its malfunction, to ensure its availability, facilities its faults detection and diagnosis [1][2].…”

Section: Introductionmentioning

confidence: 99%

Faults modeling of the impedance and reversed polarity types within the PV generator operation

Rezgui

Mouss

et al. 2014

3rd International Symposium on Environmental Friendly Energies and Applications (EFEA)

View full text Add to dashboard Cite

International audience— In this paper, we proposed a new mathematical model of the I-V characteristic of a faulty photovoltaic generator. It presents its behavior in normal and faulty operations. In particular, when its basic components such as cells, bypass and blocking diodes are subjected to the impedance or reversed polarity faults. The developed model of the faulty PV generator will allow studying of the I-V characteristic, measures the tolerances of the technical functions, avoids numerous experiments, and ensure better assessment of fault consequences. NOMENCLATURE I ph = Photocurrent standard condition. I 0 = Reverse saturation current of the diode. Z = Electrical impedance R S = Cell series resistance. nc: ncg / ncp = Cell number: good / defective. ng: ngg / ngp = Group number: good / defective. nm: nmg / nmp = Module number: good / defective. ns: nsg / nsp = String number: good / defective. nfg / nfp = Good / defective generator. N Cells = Number of cells in each group. N Groups = Number of groups in each module. N Modules = Number of modules in each string. N Strings = Number of strings in each generator. V / I = Voltage / current. P = Power. I Bypass_Diode = Bypass diode current. V Cell_Imposed = Voltage imposed. a = Diode ideality factor. V t = Diode Thermal voltage

show abstract

“…It integrates on the same die a DC-DC converter to drive rotor coil, similar to the one described in [9], different I/O interfaces, a power management block and a small digital part that manage a serial communication with an external digital core, implemented on an FPGA. The FPGA solution has been chosen to increase the flexibility, like in [10]. This paper focuses on studying the DC-DC converter block.…”

Section: Proposed Smart Power Ics Design Methodologymentioning

confidence: 99%

Towards Automatic Diagnosis of Minority Carriers Propagation Problems in HV/HT Automotive Smart Power ICs

Moursy

Zeng

Iskander

et al. 2016

Proceedings of the 2016 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

View full text Add to dashboard Cite

Abstract-In this paper, a proposed methodology to identify the substrate coupling effects in smart power integrated circuits is presented. This methodology is based on a tool called AUTOMICS to extract substrate parasitic network. This network comprises diodes and resistors that are able to maintain the continuity of minority carrier concentration. The contribution of minority carriers in the substrate noise is significant in high-voltage and high temperature applications. The proposed methodology along with conventional latch-up problem identification for a test case automotive chip AUTOCHIP1 are presented. The time of the proposed methodology is significantly shorter than the conventional one. The proposed methodology could significantly shorten the time-to-market and ameliorate the robustness of the design.

show abstract

An high voltage CMOS voltage regulator for automotive alternators with programmable functionalities and full reverse polarity capability

Cited by 10 publications

References 3 publications

Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications

Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications

Faults modeling of the impedance and reversed polarity types within the PV generator operation

Towards Automatic Diagnosis of Minority Carriers Propagation Problems in HV/HT Automotive Smart Power ICs

Contact Info

Product

Resources

About