An FPGA-based spectral anomaly detection system

Moss, D.; Zhang, Zhe; Fraser, Nicholas J.; Leong, Philip H. W.

doi:10.1109/fpt.2014.7082772

Cited by 5 publications

(2 citation statements)

References 13 publications

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“…Some studies have focused on ECG anomaly detection [5], [6]. There have also been attempts to implement ECG outlier detector on an FPGA [7]. In this study, we used an unsupervised learning technique to train the autoencoder, whereas a supervised learning technique has been used in most studies.…”

Section: Deep Learning Ecg Analysismentioning

confidence: 99%

Energy-Efficient ECG Signals Outlier Detection Hardware Using a Sparse Robust Deep Autoencoder

Soga

Sato

Nakahara

2021

IEICE Trans. Inf. & Syst.

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Advancements in portable electrocardiographs have allowed electrocardiogram (ECG) signals to be recorded in everyday life. Machine-learning techniques, including deep learning, have been used in numerous studies to analyze ECG signals because they exhibit superior performance to conventional methods. A mobile ECG analysis device is needed so that abnormal ECG waves can be detected anywhere. Such mobile device requires a real-time performance and low power consumption, however, deep-learning based models often have too many parameters to implement on mobile hardware, its amount of hardware is too large and dissipates much power consumption. We propose a design flow to implement the outlier detector using an autoencoder on a low-end FPGA. To shorten the preparation time of ECG data used in training an autoencoder, an unsupervised learning technique is applied. Additionally, to minimize the volume of the weight parameters, a weight sparseness technique is applied, and all the parameters are converted into fixed-point values. We show that even if the parameters are reduced converted into fixed-point values, the outlier detection performance degradation is only 0.83 points. By reducing the volume of the weight parameters, all the parameters can be stored in on-chip memory. We design the architecture according to the CRS format, which is the well-known data structure of a sparse matrix, minimizing the hardware size and reducing the power consumption. We use weight sharing to further reduce the weight-parameter volumes. By using weight sharing, we could reduce the bit width of the memories by 60% while maintaining the outlier detection performance. We implemented the autoencoder on a Digilent Inc. ZedBoard and compared the results with those for the ARM mobile CPU for a built-in device. The results indicated that our FPGA implementation of the outlier detector was 12 times faster and 106 times more energy-efficient.

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Section: Deep Learning Ecg Analysismentioning

confidence: 99%

Energy-Efficient ECG Signals Outlier Detection Hardware Using a Sparse Robust Deep Autoencoder

Soga

Sato

Nakahara

2021

IEICE Trans. Inf. & Syst.

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“…Regarding electromagnetic spectrum monitoring, Moss et al 6 proposed a spectral anomaly detection (SAD) system optimized for FPGAs by combining a low-latency discrete fourier transform (DFT) to obtain the power spectrum and an efficient anomaly detection algorithm based on the construction of bitmaps derived from the time series signal. However, their algorithm is limited, as it is only able to detect anomalies in regular time series.…”

Section: Related Workmentioning

confidence: 99%

A privacy‐focused approach for anomaly detection in IoT networks

et al. 2021

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IoT devices present a series of liabilities to administrators that aim for fully secure networks. Owing to their heterogeneity and limited processing power, administrators often implement monitoring mechanisms to prevent unauthorized use of resources and data exfiltration. However, most approaches allow for easy discrimination of private behavioral patterns of its users or nodes by their MAC or IP addresses. Inferring data exchange patterns at the physical layer is a more complex task, as a single signal power indicator may correspond to a mixture of simultaneous data transmissions. This article proposes privacy-focused mechanisms by resorting to physical layer data analysis and one-class classification models to perform anomaly detection in IoT networks. We present a full processing pipeline that considers the signal that identifies and models patterns on the channel activity and silence periods. We train our models with data captured from interactions with an Amazon Echo with devices generating background noise and test them against a similar scenario with a tampered network node periodically uploading data. Our data show that the best performing model, kernel density estimation, is able to detect anomalies with a 99% precision rate, even surpassing the tested neural networks approaches. We also propose a framework that aims to deploy validated models into production IoT environments. We designed an end-to-end data flow that autonomously extracts data and classifies them at the anomaly detection server. The envisioned components were designed to be horizontally scaled for a myriad of data streams and machine learning algorithms working in parallel. | INTRODUCTIONWith the advent of Internet of Things (IoT) and wireless mesh networks, security risks inherent to these types of networks, namely, unauthorized use of resources and data exfiltration, have grown in number and severity. Currently, embedded sensors have become the trend, being used in both home automation and in critical and sensible infrastructures. IoT devices are always a security liability due to their heterogeneity, lack of constant monitoring, their placement in open wireless mediums, their limited resources, and, more recently, the access to locally stored sensitive data. 1,2 Manufacturers do not implement strong authentication and encryption algorithms to be used in the communications between devices, forcing administrators to use monitoring strategies to keep the network secure.

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