An FPGA based human detection system with embedded platform

Hsiao, Pei‐Yung; Lin, Shih-Yu; Huang, Shih-Shinh

doi:10.1016/j.mee.2015.01.018

Cited by 22 publications

(8 citation statements)

References 5 publications

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“…The literature also contains reports on HOG implementations in FPGAs, especially for pedestrian detection [18][19][20][21][22][23][24][25][26][27][28][29]. For us, it is interesting to note that they also include some previously introduced simplifications of HOG calculation, which are mostly implementation-related simplifications, rather than intrinsic algorithm changes.…”

Section: Related Workmentioning

confidence: 99%

“…Such changes include the usage of lookup tables (LUTs) for obtaining the square root, replacement of several multiplications by shifting operations, as well as using for normalization the closest power-of-two number [21,22]. In [18] the authors present in detail the implementation of HOG and SVM, for person detection, on an FPGA. One new aspect presented in the paper is the effect of fixed-point number representation on the system precision.…”

Section: Related Workmentioning

confidence: 99%

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A New Method of Histogram Computation for Efficient Implementation of the HOG Algorithm

Ilas

2018

Computers

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In this paper we introduce a new histogram computation method to be used within the histogram of oriented gradients (HOG) algorithm. The new method replaces the arctangent with the slope computation and the classical magnitude allocation based on interpolation with a simpler algorithm. The new method allows a more efficient implementation of HOG in general, and particularly in field-programmable gate arrays (FPGAs), by considerably reducing the area (thus increasing the level of parallelism), while maintaining very close classification accuracy compared to the original algorithm. Thus, the new method is attractive for many applications, including car detection and classification.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

A New Method of Histogram Computation for Efficient Implementation of the HOG Algorithm

Ilas

2018

Computers

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“…However, their approach was a highly optimised hardware implementation with less flexibility for future extension. Hsiao et al [9] proposed an ARM and FPGA co-design to implement the entire HOG algorithm. Their design supported multiple classifiers (i.e, SVM and AdaBoost) and was able to process 15 FPS whilst detecting 1075 objects per second.…”

Section: Related Workmentioning

confidence: 99%

Towards a scalable hardware/software co-design platform for real-time pedestrian tracking based on a ZYNQ-7000 device

Yang

Sillitoe

et al. 2017

2017 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia)

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Currently, most designers face a daunting task to research different design flows and learn the intricacies of specific software from various manufacturers in hardware/software co-design. An urgent need of creating a scalable hardware/software co-design platform has become a key strategic element for developing hardware/software integrated systems. In this paper, we propose a new design flow for building a scalable co-design platform on FPGA-based system-on-chip. We employ an integrated approach to implement a histogram oriented gradients (HOG) and a support vector machine (SVM) classification on a programmable device for pedestrian tracking. Not only was hardware resource analysis reported, but the precision and success rates of pedestrian tracking on nine open access image data sets are also analysed. Finally, our proposed design flow can be used for any real-time image processingrelated products on programmable ZYNQ-based embedded systems, which benefits from a reduced design time and provide a scalable solution for embedded image processing products.

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“…A Real-time Updatable FPGA-based Architecture was proposed in [15] for fast regular expression matching. More systems were designed based on FPGA, like a digital coincidence measurement system [16], a chlorophyll fluorescence measurement system [17], power flow monitoring system in a microgrid [18], human detection system [19], an image analysis system for automatically controlled pan-tilt smart camera [20], etc.…”

Section: Introductionmentioning

confidence: 99%

Design of a field programmable gate array based test launch and control system for hybrid vehicle

Gao

Wang

2016

Measurement

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In order to satisfy the throttling and multiple restart characteristics of the hybrid rocket engine and guarantee the controllability and security of hybrid rocket, the test launch and control system for hybrid vehicle needs to achieve ground power control, serial communication with the flight control computer and the telemetry system, onboard thermal battery activation, battery voltage acquisition, power conversion, pressure monitoring, valve control, booster ignition, power-off and remote pressure relief in emergency. Considering the complexity of the test launch and control system for hybrid system and the advantages of Field Programmable Gate Array (FPGA), such as, a large number of I/O ports, ability to efficiently implement large-scale systems and programmability, a FPGA based test launch and control system for a type of hybrid vehicle was designed. Many conducted ground and flight experiments have proved that the system has superior performance in integration, universalization, miniaturization, automation and can perfectly meet the needs of the hybrid vehicle.

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An FPGA based human detection system with embedded platform

Cited by 22 publications

References 5 publications

A New Method of Histogram Computation for Efficient Implementation of the HOG Algorithm

A New Method of Histogram Computation for Efficient Implementation of the HOG Algorithm

Towards a scalable hardware/software co-design platform for real-time pedestrian tracking based on a ZYNQ-7000 device

Design of a field programmable gate array based test launch and control system for hybrid vehicle

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