An FPGA Based All-Digital Transmitter with Radio Frequency Output for Software Defined Radio

Abstract

ABSTRACT

Concurrent Multiband Digital Outphasing Transmitter Architecture Using Multidimensional Power Coding

“…Since resistive elements do not alter phase, the PA output node voltages V 1 and V 2 can be written in a phasor form as (20) with the same phase as the voltage sources where V 0 is a constant. Then we find the power delivered to the load R L as (21) and we obtain the DC power delivered by the voltage sources in the same way as (22) where the second term represents the extra power consumption due to the finite turn-on resistance while the third term shows the additional power consumption by the off-state leakage.…”

“…Multilevel IF PWM (ML-IFPWM) [19] compromises the high coding efficiency of ML-RFPWM and the low out-of-band emission of ML-RFDSM, but with additional spurious tones that prevent the application of ML-IFPWM on concurrent multiband transmission. Combining baseband delta-sigma (DSM) modulation and baseband PWM [20], [21] shows the advantage of both techniques: a low oversampling rate is allowed while a low out-of-band emission is achieved. When the baseband DSM-PWM signals are up-converted to a carrier frequency using a digital mixer, however, these hybrid DSM-PWM transmitters would generate in-band spurious tones if a concurrent multiband signal is transmitted.…”

A Reconfigurable Platform to Drive High Frequency Class S Power Amplifiers Using Multi-gigabit Transceivers

“…However, FPGAs are gaining acceptance for prototyping in the RF research field: In [2] a Virtex-4 FPGA is used for the generation of the envelope Σ∆ modulation (EDSM), but not for the RF carrier section. In [17] a Multi-Gigabit transceiver is used for the generation of RF-PWM modulation.…”

A 27.6 µW 315 MHz low-complexity OOK receiver with on-off RF front-end

“…It is similar to the transmitter presented in [3], except power amplifier. The power amplifier in [3] is a class-F one while a switching-mode power amplifier (SMPA) is employed in this work [8,9]. Thus the transmitter can be implemented completely on the FPGA.…”

“…Recently, many low power receivers have been reported [1,2,3,4,5,6,7,8]. The receivers on [1,2] and [4] are down-conversion receivers with on-chip local oscillators and mixers.…”