An error detecting scheme with input offset regulation for enhancing reliability of ultralow-voltage SRAM

Yang, Pan; Ye, Xiaocan; Zhao, Yongxin; Zhang, Wei; Huang, Shoumou; Huang, Yang; Wang, Yujie

doi:10.1016/j.microrel.2020.113788

Cited by 4 publications

(1 citation statement)

References 13 publications

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“…As V DD reduces to the near-threshold region, the frequency decreases slightly and the energy efficiency of each operation is significantly improved. Once the power supply voltage enters the sub-threshold region, the energy efficiency and frequency drop sharply due to leakage energy dominance [6] . And at Ultra-Low Voltage (ULV) below 0.3 V, the degradation of SRAM's performance is more drastically than that of logic.…”

Section: Wide-voltage Memorymentioning

confidence: 99%

Near-Threshold Wide-Voltage Design Review

Zhao

Yang

Chen

et al. 2023

Tsinghua Sci. Technol.

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This paper presents a comprehensive review of near-threshold wide-voltage designs on memory, resilient logic designs, low voltage Radio Frequency (RF) circuits, and timing analysis. With the prosperous development of wearable applications, low power consumption has become one of the primary challenges for IC designs. To improve the power efficiency, the prefer scheme is to operate at an ultra low voltage of Near Threshold Voltage (NTV). For the performance variation and degradation, a self-adaptive margin assignment technique is proposed in the low voltage. The proposed technique tracks the circuit states in real time and dynamically allocates voltage margins, reducing the minimum supply voltage and achieving higher energy efficiency. The self-adaptive margin assignment technique can be used in Static Random Access Memory (SRAM), digital circuits, and analog/RF circuits. Based on the self-adaptive margin assignment technique, the minimum voltage in the 40 nm CMOS process is reduced to 0.6 V or even lower, and the energy efficiency is increased by 3-4 times.

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Section: Wide-voltage Memorymentioning

confidence: 99%

Near-Threshold Wide-Voltage Design Review

Zhao

Yang

Chen

et al. 2023

Tsinghua Sci. Technol.

View full text Add to dashboard Cite

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An efficient common source sense amplifier for single ended SRAM

Leavline

Sugantha

2023

Memories - Materials, Devices, Circuits and Systems

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Design of High Precision Temperature Sensor with Current Gain Compensation Technology for On-Chip Application

Luo

2023

Journal of Nanoelectronics and Optoelectronics

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The integration of on-chip temperature sensors within various systems, industrial Internet of Things (IoT), and wireless sensor networks is greatly facilitated by their small size, cost-effectiveness, and capability to provide direct digital output. However, the diverse application scenarios pose challenges in designing these sensors. On one hand, real-time clock calibration demands high-precision temperature sensors, while on-chip heat management emphasizes compactness and low-voltage operation. Additionally, streamlining the calibration cost for mass production holds significant practical value. Addressing these challenges, this study systematically investigates on-chip complementary metal-oxide-semiconductor (CMOS) temperature sensors based on distinct signal domains processed by temperature readout circuits. Specifically, the research commences by analyzing the issues of several degeneracy points in the front-end circuit of a bipolar junction transistor (BJT) temperature sensor with current gain compensation technology. To address the intricate design challenges in advanced technologies and calibration complexities in industrial applications, dynamic component matching, current gain compensation, and chopper stabilization are harnessed. A novel dynamic current gain canceling technique for temperature readout is introduced, enhancing temperature measurement accuracy without incurring additional power consumption or area overhead. Ultimately, an all-digital CMOS temperature sensor is realized using the SMIC 55 nm CMOS process. Occupying a mere 0.29 mm2 of core area, the design operates efficiently across a wide supply voltage range of 1.2 V to 3.6 V. Covering a temperature spectrum from −40 °C to 125 °C, the sensor demonstrates a calibration error of just ±0.7 °C. This achievement is attributed to the incorporation of the proposed dynamic current gain compensation technique.

show abstract

An error detecting scheme with input offset regulation for enhancing reliability of ultralow-voltage SRAM

Cited by 4 publications

References 13 publications

Near-Threshold Wide-Voltage Design Review

Near-Threshold Wide-Voltage Design Review

An efficient common source sense amplifier for single ended SRAM

Design of High Precision Temperature Sensor with Current Gain Compensation Technology for On-Chip Application

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