An enhanced-performance CMOS imager with a flushed-reset photodiode pixel

Pain, Bedabrata; Yang, Guang; Cunningham, Thomas J.; Wrigley, C.; Hancock, B.

doi:10.1109/ted.2002.806969

Cited by 37 publications

(19 citation statements)

References 6 publications

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“…Random access is achieved via two 10 bit address decoders and a 12 bit ADC is used for full frame readout at up to 140 frames per second, while higher readout rates can be achieved on regions of interest. It also features the possibility of achieving low reset noise by means of a ''flushed'' or soft reset mode [17], although this feature was not exploited in the present experiment. A detailed description of the sensor can be found in Ref.…”

Section: Methodsmentioning

confidence: 99%

First evidence of phase-contrast imaging with laboratory sources and active pixel sensors

Olivo¹,

Arvanitis²,

Bohndiek³

et al. 2007

Nuclear Instruments and Methods in Physics Research Section A:

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Section: Methodsmentioning

confidence: 99%

First evidence of phase-contrast imaging with laboratory sources and active pixel sensors

Olivo¹,

Arvanitis²,

Bohndiek³

et al. 2007

Nuclear Instruments and Methods in Physics Research Section A:

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“…However, this method causes an offset level due to the influence of the threshold voltage mismatch. The hard reset can completely eliminate the influence of the threshold voltage [8]. The NMOSFET hard reset requires an additional larger voltage source than the power supply voltage.…”

Section: Pixel Structurementioning

confidence: 99%

“…To overcome these problems, several on-chip techniques have been proposed that can extend the dynamic range of image sensors. Several approaches have been proposed to extend the dynamic range of an image sensor [2][3][4][5][6][7][8][9]. Logarithmic pixel can achieve a dynamic range above 100 dB.…”

Section: Introductionmentioning

confidence: 99%

Linear-Logarithmic CMOS Image Sensor with Reduced FPN Using Photogate and Cascode MOSFET

Bae

Choi

Kim

et al. 2017

Proceedings of Eurosensors 2017, Paris, France, 3–6 September 2017

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Abstract:We propose a linear-logarithmic CMOS image sensor with reduced fixed pattern noise (FPN). The proposed linear-logarithmic pixel based on a conventional 3-transistor active pixel sensor (APS) structure has additional circuits in which a photogate and a cascade MOSFET are integrated with the pixel structure in conjunction with the photodiode. To improve FPN, we applied the PMOSFET hard reset method as a reset transistor instead of NMOSFET reset normally used in APS. The proposed pixel has been designed and fabricated using 0.18-μm 1-poly 6-metal standard CMOS process. A 120 × 240 pixel array of test chip was divided into 2 different subsections with 60 × 240 sub-arrays, so that the proposed linear-logarithmic pixel with reduced FPN could be compared with the conventional linear-logarithmic pixel. We confirmed a reduction of pixel response variation which affected image quality.

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“…The photodiode region is responsible for generating and collecting signal charge. Three MOSFET transistors are required to measure the charge on the diode: T1 is a reset MOSFET, which resets the photodiode before charge is integrated on the diode, T2 is a source follower MOSFET, which converts signal charge to an output voltage, and T3 is a row-select MOSFET, which selects a pixel for readout (Pain et al, 2004;Janesick, 2004).…”

Section: Cmos Pixels and Swap Acquisition Modesmentioning

confidence: 99%

“…Soft reset is known (Pain et al, 2004) to be less noisy (σ = √ kT /2C) than hard reset (σ = √ kT /C), although actual hardware implementation details might complicate the comparison (e.g., differences in feed-through voltage). But soft reset has three clearly posed, related disadvantages:…”

Section: Figure 10mentioning

confidence: 99%

CMOS-APS Detectors for Solar Physics: Lessons Learned during the SWAP Preflight Calibration

et al. 2008

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CMOS-APS imaging detectors open new opportunities for remote sensing in solar physics beyond what classical CCDs can provide, offering far less power consumption, simpler electronics, better radiation hardness, and the possibility of avoiding a mechanical shutter. The SWAP telescope onboard the PROBA2 technology demonstration satellite of the European Space Agency will be the first actual implementation of a CMOS-APS detector for solar physics in orbit. One of the goals of the SWAP project is precisely to acquire experience with the CMOS-APS technology in a real-live space science context. Such a pre- cursor mission is essential in the preparation of missions such as Solar Orbiter where the extra CMOS-APS functionalities will be hard requirements. The current paper concentrates on specific CMOS-APS issues that were identified during the SWAP preflight calibration measurements. We will discuss the different readout possibilities that the CMOS-APS detector of SWAP provides and their associated pros and cons. In particular we describe the "image lag" effect, which results in a contamination of each image with a remnant of the previous image. We have characterised this effect for the specific SWAP implementation and we conclude with a strategy on how to successfully circumvent the problem and actually take benefit of it for solar monitoring.

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An enhanced-performance CMOS imager with a flushed-reset photodiode pixel

Cited by 37 publications

References 6 publications

First evidence of phase-contrast imaging with laboratory sources and active pixel sensors

First evidence of phase-contrast imaging with laboratory sources and active pixel sensors

Linear-Logarithmic CMOS Image Sensor with Reduced FPN Using Photogate and Cascode MOSFET

CMOS-APS Detectors for Solar Physics: Lessons Learned during the SWAP Preflight Calibration

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