An Enhanced Gain-Bandwidth Class-AB Miller op-amp With 23,800 MHz·pF/mW FOM, 11-16 Current Efficiency and Wide Range of Resistive and Capacitive Loads Driving Capability

Paul, Anindita; Ramírez-Angulo, J.; Sánchez, Agustín Rueda; López-Martín, Antonio J.; Carvajal, R.G.; Li, Frank X.

doi:10.1109/access.2021.3077532

Cited by 8 publications

(3 citation statements)

References 21 publications

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“…Our design objective is to minimize the area of analog circuits. However, designing an amplifier is always a trade-off, so we introduce the Area Figure of Merit for smallsignal (AFOM ss ) that considers silicon area to assess the designed circuits' overall performance [64]:…”

Section: Numerical Results and Discussionmentioning

confidence: 99%

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Lagos-Eulogio,

Miranda-Romagnoli,

Seck-Tuoh-Mora

et al. 2023

Computation

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In this work, we propose a variation of the cellular particle swarm optimization algorithm with differential evolution hybridization (CPSO-DE) to include constrained optimization, named Ts-CPD. It is implemented as a kernel of electronic design automation (EDA) tool capable of sizing circuit components considering a single-objective design with restrictions and constraints. The aim is to improve the optimization solutions in the sizing of analog circuits. To evaluate our proposal’s performance, we present the design of three analog circuits: a differential amplifier, a two-stage operational amplifier (op-amp), and a folded cascode operational transconductance amplifier. Numerical simulation results indicate that Ts-CPD can find better solutions, in terms of the design objective and the accomplishment of constraints, than those reported in previous works. The Ts-CPD implementation was performed in Matlab using Ngspice and can be found on GitHub (see Data Availability Statement).

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Section: Numerical Results and Discussionmentioning

confidence: 99%

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Lagos-Eulogio,

Miranda-Romagnoli,

Seck-Tuoh-Mora

et al. 2023

Computation

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“…This will result in a smaller, lighter battery with a longer lifespan. Small circuits are also suggested in a similar way to reduce thermal dissipation [12], [13]. The overall tendency of this work is to reduce the circuit size in order to obtain better performance parameter values.…”

Section: Introductionmentioning

confidence: 99%

Comparison of the Transistor Channel Length and Performance Parameters of a Fully Differential Operational Amplifier

Genzebu

2023

Preprint

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Today's practical applications require an amplifier with high-performance specifications. Reduce the scale of transistor sizes in operational amplifiers (op-amps) to obtain better values for the performance characteristics are important. The main objective of this study was to understand the relationship between the performance parameters of a fully differential amplifier and the channel length of the transistors. In this study, fully differential op-amp performance metrics were examined and contrasted with their channel lengths utilizing a common 1.8V power supply. The graphs were plotted using Python software. The outcome demonstrates that, as the transistor's channel length decreases, the gain and unity gain band width of the fully differential op-amp increase. This demonstrates how reducing the transistor's size allows for high amplification devices. The totally differential op-amp's power dissipation and settling time are also decreased as the transistor's channel length is decreased. This shows that in order to create fully differential op-amps that operate for long periods of time, the transistor size needs to be decreased.

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“…Maintaining the loop stability is the main challenge of the feedback OTAs supporting a wide C L range [2], [5], [12]. Each stage adds a high-impendence node and, consequently, a dominant pole in the transfer function which potentially depends on the loading conditions, so keeping the OTA stable over a broad C L range entails a carefully designed compensation network.…”

Section: Introductionmentioning

confidence: 99%

Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C _L

Aminzadeh,

Ballo,

Grasso

et al. 2023

IEEE Trans. VLSI Syst.

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Feedback amplifiers consisting of multiple gain stages are used to establish highly accurate buffered/amplified signals that can drive a wide range of capacitive load (CL). This article models, analyzes, and presents the measurement results of a high-gain four-stage operational transconductance amplifier (OTA) that is able to handle a wide range of CL up to infinity. In addition to local compensation capacitors and nulling resistors in the intermediate stages, two high-speed feedback loops made by parallel Miller capacitors and current buffers provide Miller compensation and the consequent pole-splitting in the lower CL range. The dominant pole is made dependent on the CL for the higher CL range, enabling the maintenance of the stability conditions up to infinite CL. The proposed amplifier was integrated into a 65-nm CMOS technology, consuming 140-µA static current under a 1.2-V supply and an active area of 0.0086 mm 2 . A dc gain greater than 100 dB was also perceived with a unity-gain frequency (UGF) of 4.09, 2.01, and 0.27 MHz for 4.7, 10, and 100-nF load capacitors, respectively. The average slew rate (SR) is 0.59 V/µs, when the OTA is formed as a buffer targeting the CLs higher than 4.7-nF.

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An Enhanced Gain-Bandwidth Class-AB Miller op-amp With 23,800 MHz·pF/mW FOM, 11-16 Current Efficiency and Wide Range of Resistive and Capacitive Loads Driving Capability

Cited by 8 publications

References 21 publications

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Comparison of the Transistor Channel Length and Performance Parameters of a Fully Differential Operational Amplifier

Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C _L

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An Enhanced Gain-Bandwidth Class-AB Miller op-amp With 23,800 MHz·pF/mW FOM, 11-16 Current Efficiency and Wide Range of Resistive and Capacitive Loads Driving Capability

Cited by 8 publications

References 21 publications

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm

Comparison of the Transistor Channel Length and Performance Parameters of a Fully Differential Operational Amplifier

Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C L

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Product

Resources

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Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C _L