2015
DOI: 10.1587/elex.12.20150236
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An empirical validation of power-performance scaling: DVFS vs. multi-core scaling in big.LITTLE processor

Abstract: Abstract:In this letter, we present a power-performance scaling in asymmetric multi-core embedded microprocessor. Asymmetric multi-core processor draws attention in embedded systems because the design tries to catch both energy-efficiency and high-performance. In this letter, we revise a multi-core power-performance scaling study with more practical parameters, and present empirical validation in a real embedded processor.

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Cited by 5 publications
(1 citation statement)
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“…To improve energy efficiency, platforms have been enhanced with Dynamic Voltage and Frequency Scaling (DVFS) [4], which can dynamically adjust the supply voltage and clock frequency of a processor to change task execution time and energy. In real-time application domains, approximated results obtained in time are preferred over accurate results obtained after the deadline.…”
Section: Introductionmentioning
confidence: 99%
“…To improve energy efficiency, platforms have been enhanced with Dynamic Voltage and Frequency Scaling (DVFS) [4], which can dynamically adjust the supply voltage and clock frequency of a processor to change task execution time and energy. In real-time application domains, approximated results obtained in time are preferred over accurate results obtained after the deadline.…”
Section: Introductionmentioning
confidence: 99%