Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA 2007) 2007
DOI: 10.1109/iwia.2007.14
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An Embedded Processor: Is It Ready for High-Performance Computing?

Abstract: High power-performance ratio is the most important factor in high-performance computing, whose performance is limited by its power budget. A SuperH TM (SH) embedded processor core, SH-X3, implemented in a 90-nm CMOS process running at 600 MHz achieved 1080 Dhrystone MIPS, 4.2 GFLOPS, and 55M polygons/s. Its power performance ratio reaches to as high as 3000 MIPS/W. It is, therefore, a candidate processor for high-performance computing. This paper focuses on the SH processors' low power features, floating-point… Show more

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Cited by 3 publications
(1 citation statement)
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“…An SH -X3, the third -generation core, supported multicore features for both SMP and AMP [33,34] . It was developed using a 90 -nm generic process in 2006, and achieved 600 MHz and 1,080 MIPS with 360 mW, resulting in 3,000 MIPS/W and 3.2 GIPS 2 /W.…”
Section: History Of Sh Processor Coresmentioning
confidence: 99%
“…An SH -X3, the third -generation core, supported multicore features for both SMP and AMP [33,34] . It was developed using a 90 -nm generic process in 2006, and achieved 600 MHz and 1,080 MIPS with 360 mW, resulting in 3,000 MIPS/W and 3.2 GIPS 2 /W.…”
Section: History Of Sh Processor Coresmentioning
confidence: 99%