“…Besides the still image analysis, a directional-edge-based object tracking algorithm is also proposed in [58] with its FPGA implementation in [59], in which a speed of 150 frames/s was experimentally demonstrated, and a speed of 900 frames/s was expected if the algorithm was directly implemented on VLSI with an on-chip image sensor. The succeeding works [60]- [63] further developed edge-based motion recognition algorithms in which the self-speed-adaptive MFE processing is included as one of the most crucial steps. Although VLSI chips for post-MFE optical flow detection [64], [65] and pattern recognition [55], [56], [66]- [68] have been implemented, a VLSI dedicated to high-speed and low-power MFE has not yet been developed.…”