An efficient VLSI architecture for convolutional code decoding

Shiau, Yeu-Horng; Chen, Pei-Yin; Yang, Hung‐Yu; Lin, Yiming; Huang, Shi-Gi

doi:10.1109/isne.2010.5669156

Cited by 3 publications

(2 citation statements)

References 10 publications

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“…A new type of coding, called Viterbi coding, can achieve a level of performance that comes closer to theoretical bounds than more conventional coding systems [2].…”

Section: Introductionmentioning

confidence: 99%

FPGA based design and implementation of modified Viterbi decoder for a Wi-Fi receiver

Veshala

Padmaja

Ghanta³

2013

2013 Ieee Conference on Information and Communication Technologies

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Viterbi Decoders are employed in digital wireless communication systems to decode the convolution codes which are the forward error correcting codes. Although widely-used, the most popular communications decoding algorithm, the Viterbi Algorithm (VA), requires an exponential increase in hardware complexity to achieve greater decode accuracy. When the applications based with wireless technology has been developed tremendously with the world. The constraint length associated with the input bits are large, hence it needs to implement the larger constraint length with lesser hardware and lesser computations for decode the original data. When the decoding process uses the Modified Viterbi Algorithm (MVA) computations 50% reduced and reduction in the hardware utilization, which follows the maximum-likelihood path. It shows plan ahead associated with the modified Viterbi decoder implementation using Xilinx tool in verilog design. An implementation on Field Programmable Gate Arrays (FPGA) provides user flexibility to a programmable solutions and lowering the cost.

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“…A new type of coding, called Viterbi coding, can achieve a level of performance that comes closer to theoretical bounds than more conventional coding systems [2].…”

Section: Introductionmentioning

confidence: 99%

FPGA based design and implementation of modified Viterbi decoder for a Wi-Fi receiver

Veshala

Padmaja

Ghanta³

2013

2013 Ieee Conference on Information and Communication Technologies

View full text Add to dashboard Cite

show abstract

“…Convolutional codes which are forward error correction codes offer a good alternative to block codes for transmission over a noisy channel. The purpose of forward error correction (FEC) is to improve the capacity of a channel by adding some carefully designed redundant information to the data being transmitted through the channel [1]. The Viterbi algorithm essentially performs maximum likelihood decoding to correct the errors in received data which are caused by the channel noise.…”

Section: Introductionmentioning

confidence: 99%

Reconfigurable Efficient Design of Viterbi Decoder for Wireless Communication Systems

Gupta¹,

Mehra²

2011

IJACSA

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Abstract-Viterbi Decoders are employed in digital wireless communication systems to decode the convolution codes which are the forward correction codes. These decoders are quite complex and dissipate large amount of power. With the proliferation of battery powered devices such as cellular phones and laptop computers, power dissipation, along with speed and area, is a major concern in VLSI design. In this paper, a low power and high speed viterbi decoder has been designed. The proposed design has been designed using Matlab, synthesized using Xilinx Synthesis Tool and implemented on Xilinx Virtex-II Pro based XC2vpx30 FPGA device. The results show that the proposed design can operate at an estimated frequency of 62.6 MHz by consuming fewer resources on target device.

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A Low-Power Codeword-Based Viterbi Decoder with Fine-Grained Error Detection and Correction Techniques

2017

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An efficient VLSI architecture for convolutional code decoding

Cited by 3 publications

References 10 publications

FPGA based design and implementation of modified Viterbi decoder for a Wi-Fi receiver

FPGA based design and implementation of modified Viterbi decoder for a Wi-Fi receiver

Reconfigurable Efficient Design of Viterbi Decoder for Wireless Communication Systems

A Low-Power Codeword-Based Viterbi Decoder with Fine-Grained Error Detection and Correction Techniques

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