2021
DOI: 10.1109/tnano.2020.3049087
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An Efficient Ultra-Low-Power and Superior Performance Design of Ternary Half Adder Using CNFET and Gate-Overlap TFET Devices

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Cited by 23 publications
(16 citation statements)
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“…However, the designs in refs. [17, 101, 102] are fairly fast. Moreover, they provide a kind of parallelism in the RCA scenario when the first THAs in each bit positions can perform simultaneous computations.…”
Section: Simulation Results and Comparisonmentioning
confidence: 99%
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“…However, the designs in refs. [17, 101, 102] are fairly fast. Moreover, they provide a kind of parallelism in the RCA scenario when the first THAs in each bit positions can perform simultaneous computations.…”
Section: Simulation Results and Comparisonmentioning
confidence: 99%
“…Moreover, they provide a kind of parallelism in the RCA scenario when the first THAs in each bit positions can perform simultaneous computations. This is one of the reasons why the RCA constructed by [17] is very fast. Once the ternary inputs are decoded, the employment of ternary gates is no longer needed, and binary gates can be replaced to improve performance. The TFA in ref.…”
Section: Simulation Results and Comparisonmentioning
confidence: 99%
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