An Efficient Two-Dimension BIST Compression Approach

Abstract

In this paper a two-dimension BIST compression scheme is presented; the proposed scheme is utilized in order to drive down the number of deterministic vectors to achieve complete fault coverage in BIST applications. By introducing shifting compression and input reduction, vertical and horizontal compression are realized respectively to achieve two-dimension BIST compression. Experimental results show that the BIST shifting compression based on input reduction can achieve great compression rate as much as 99%. Comparisons with previously competitive presented schemes indicate that the proposed scheme provide an efficient BIST compression approach with lower storage overhead.