2018 IEEE International Symposium on Circuits and Systems (ISCAS) 2018
DOI: 10.1109/iscas.2018.8351004
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An Efficient Hardware Architecture for the Implementation of Multi-Step Look-Ahead Sigma-Delta Modulators

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Cited by 3 publications
(2 citation statements)
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“…The SDM's maximum operating frequency f s corresponds to the register's one and, as expected, determines the input signal's maximum operating frequency f B that the architecture is able to process. Optionally, a dithering sequence can be employed to further decrease the SDM's output noise floor [32][33][34].…”
Section: Sdm Encodingmentioning
confidence: 99%
See 1 more Smart Citation
“…The SDM's maximum operating frequency f s corresponds to the register's one and, as expected, determines the input signal's maximum operating frequency f B that the architecture is able to process. Optionally, a dithering sequence can be employed to further decrease the SDM's output noise floor [32][33][34].…”
Section: Sdm Encodingmentioning
confidence: 99%
“…A well-known method to reduce the noise floor and improve the spectral characteristics of a quantized signal is to use sigma-delta modulators (SDMs) [32][33][34]. They convert a high-resolution signal (several bits) into a lower-bit one by employing the technique of oversampling; the input signal is sampled at a frequency much higher than the Nyquist, thus reducing the noise in the desired frequency band of interest.…”
Section: Introductionmentioning
confidence: 99%