An efficient drain-lag model for microwave GaN HEMTs based on ASM-HEMT

Abstract

Large-signal modeling of Gallium Nitride (GaN) based high electron mobility transistors (HEMTs) demands a proper description of trapping effects. In this paper, a new, simplified yet accurate drain-lag description is proposed, enhancing the simulation accuracy and the extraction flow of the physics-based compact model ASM-HEMT. The present study investigates the impact of drain lag on specific physical phenomena, focusing on the relation between trap states, surface-potential calculations, and electron transport properties. It is supplemented with a revised extraction procedure, minimizing the required measurements, thereby the undesired consequences of several passes on the same device, using pulsed I-V and pulsed S-parameters only, and approaches for efficient and accurate simulation results. We show that the proposed trap model is a determinative tool for simulating both small and large-signal behavior predicting precisely S-parameters and load-pull performance.

Study of 1500 V AlGaN/GaN High-Electron-Mobility Transistors Grown on Engineered Substrates

“…Hence, the advanced buffer layer in the GaN on QST HEMTs correlates with enhanced device performance, characterized by reduced gate/drain lag effects under the specified measurement conditions. This underscores that the buffer layer of GaN on QST substrates providing a more formidable barrier against trap-related degradation, thereby ensuring greater charge carrier mobility and augmented device reliability [14,15].…”