An atm switching system based on a distributed control architecture

Koinuma, T.; Takahashi, Tomohiro; Yamada, Hiroyuki; Hino, S.; Hirano, Minoru

doi:10.1109/iss.1990.765802

Cited by 29 publications

(4 citation statements)

References 2 publications

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“…Section 2 outlines the experimental system and Sec. 3 munication control unit, and terminal control units are newly developed and apply the VME bus for economy. The control programs of these units run on a real-time micro-CTRON operating system4 (OS).…”

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confidence: 99%

High-speed hardware architecture for high-definition videotex system

Maruyama

Sakamoto

Ishibashi

et al. 1992

J. Electron. Imaging

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A high-speed hardware architecture for an experimental high-definition videotex system for a broadband integrated services digital network is introduced. The key technologies required are high-speed protocol processing, high-speed data transfer, and highspeed picture readout from disks. High-speed protocol processing using a newly developed virtual memory copy, content rearrangement memory, two-bus architecture, and simultaneous editing and analyzing allows a requested 6-MB picture to be displayed within 3s.

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mentioning

confidence: 99%

High-speed hardware architecture for high-definition videotex system

Maruyama

Sakamoto

Ishibashi

et al. 1992

J. Electron. Imaging

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“…To determine the feasibility of the ATM switching system, a laboratory test system has been developed and is now undergoing tests. [4] The system configuration is illustrated in Fig. 4 switching sub-planes and has a 3-switching stage structure, each switch element having a 4x4 switch LSI.…”

Section: Memory Switch Lsi Featuring Dynamic Llnk Speedmentioning

confidence: 99%

A multi-purpose memory switch LSI for ATM-based systems

Yamada

Yamada²,

Kai³

et al.

[Proceedings] GLOBECOM '90: IEEE Global Telecommunications Conference and Exhibition

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An TM switching system should be capable of handling multimedia traffic, which has different bit-rates and diversiied quality requirements. A self-routing switch is a key piece of equipment for attaining this goal. This paper proposes. a new switch construction and describes its LSI design and fabrication.The proposed switch, which is a memory switch with dynamic link speed control, can dynamically change link speeds according to traffic flow, thereby achieving high performance in any imbalanced traffic condition. The switch element also functions as a multiplexer/demultiplexer and an inserter/dropper. Thus, the proposed LSI is expected to be a key component in ATM-based equipment.A 4x4 memory switch LSI using 0.8-pm BiCMOS technology is developed, and a switching network with a capacity of 256 155-Mb/s lines is tested. Results show that the proposed LSI makes possible a compact, economical ATM switching system.

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“…Η απόδοση ενός απλού Συστήματος Μεταγωγής τύπου banyan μπορεί να βελτιωθεί αν χρησιμοποιηθούν ως στοιχειώδη μεταγωγικά στοιχεία (SEs) μεγαλύτερα από 2x2, και η διαφοροποίηση αυτή οδηγεί σε νέα κατηγορία των δικτύων μεταγωγής, τα δίκτυα τύπου delta. Τα δίκτυα μεταγωγής Delta μελετώνται στις εργασίες [16,17,18,19].…”

Section: πολυβάθμια δίκτυα Deltaunclassified

“…Γι αυτό απαιτείται μια ισορροπία μεταξύ της απόδοσης και του κόστους των. Ανάλογες εργασίες υπάρχουν στα papers [16,17,18,25,29,30,31]. Ωστόσο στην βιβλιογραφία δεν υπάρχουν αναλυτικές μέθοδοι οι οποίες να αναφέρονται στα δίκτυα αυτά, λόγω και της πολυπλοκότητάς των.…”

Section: δίκτυα μεταγωγής με παράλληλα επίπεδαunclassified

Προσεγγιστικά Αναλυτικά Μοντέλα Για Τη Μελέτη Της Απόδοσης Πολυβάθμιων Διασυνδεδεμένων Δικτύων Μεταγωγής

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An atm switching system based on a distributed control architecture

Cited by 29 publications

References 2 publications

High-speed hardware architecture for high-definition videotex system

High-speed hardware architecture for high-definition videotex system

A multi-purpose memory switch LSI for ATM-based systems

Προσεγγιστικά Αναλυτικά Μοντέλα Για Τη Μελέτη Της Απόδοσης Πολυβάθμιων Διασυνδεδεμένων Δικτύων Μεταγωγής

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