An array control unit for high performance SIMD arrays

A real-time visual processing system using a generalpurpose vision chip, an image sensor in which photo detectors and processing elements are integrated, is described. In order to control the vision chip and process its output at high speed, a novel architecture called SPARSIS, in which control process of the vision chip is pipelined and integrated with a RISC type integer pipeline, has been developed. This architecture can guarantee real-time operation with high temporal resolution, and even makes possible software-controlled AID conversion. Sample algorithms demonstrating its fine-grained realtimeness, and experimental results with the implemented system, are also described. 1229 0-7803-7272-7/02/$17.00

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An array control unit for high performance SIMD arrays

Cited by 3 publications

References 15 publications

Memory Considerations for High Performance SIMD Systems with On-Chip Control

Memory Considerations for High Performance SIMD Systems with On-Chip Control

System level simulation of a SIMD active memory enhanced PC (or, why we don't want 100% bandwidth utilisation)

A real-time visual processing system using a general-purpose vision chip

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