An area-efficient design of reconfigurable S-box for parallel implementation of block ciphers

Abstract

A LUT with Hierarchical Structure (HS-LUT) is proposed in this paper to realize the unique nonlinear component, Substitution Box (S-box), of the block ciphers. Different types of S-boxes are analyzed and four important features of them are summarized. Then, custom 4R/1W memory is proposed as the storage unit of the reconfigurable S-box, and an example set of block ciphers is put forward to describe how to achieve a satisfactory structure of reconfigurable S-box. The proposed HS-LUT is applicable for different sets of ciphers and it is implemented under TSMC 40 nm CMOS technology to compare with similar work. The comparison result shows that the proposed HS-LUT gains 6.88% to 51.76% area efficiency improvement.

A High Flexible Shift Transformation Unit Design Approach for Coarse-Grained Reconfigurable Cryptographic Arrays

“…Now, the research of arithmetic units for CGRCA creates some progress. For example, Yang et al proposed a reconfigurable S-box unit based on multi-port RAM [9]. Nan et al designed a reconfigurable logical unit implementing the cryptographic operations on the finite fields and feedback shift register [10].…”

A new compact hardware architecture of S-Box for block ciphers AES and SM4

“…And S-Box as the similar computing unit in the AES and SM4 encryption circuits, focusing on its design is the key for the implementation of new AES/SM4 encryption circuit. In [3,4], the reconfigurable S-Box based on look up table (LUT) with memory-sharing are designed, which use a sharing memory to achieve different S-Box operations for different block cipher algorithms and have the advantage of high flexibility. However, these implementations not only cover a huge area but also reduce the circuit performance.…”