An approach to synthesis of reversible circuits for partially specified functions

Perkowski, Marek; Fiszer, Robert; Kerntopf, Paweł; Lukáč, Martin

doi:10.1109/nano.2012.6322122

Cited by 4 publications

(2 citation statements)

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“…Note that NAND-AND-EXOR circuits are a new concept in logic synthesis. These circuits are a generalization of the PSE circuits introduced in [14] in which only one argument of the AND layer is a NAND and others are literals.…”

Section: Hybrid Computation In a Crossbar Arraymentioning

confidence: 99%

Memristor-Based Volistor Gates Compute Logic with Low Power Consumption

2016

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We introduce a novel volistor logic gate which uses voltage as input and resistance as output. Volistors rely on the diode-like behavior of rectifying memristors. We show how to realize the first logic level, counted from the input, of any Boolean function with volistor gates in a memristive crossbar network. Unlike stateful logic, there is no need to store the inputs as resistances, and computation is performed directly. The fan-in and fan-out of volistor gates are large and different from traditional memristor circuits. Compared to solely memristive stateful logic, a combination of volistors and stateful inhibition gates can significantly reduce the number of operations required to calculate arbitrary multi-output Boolean functions. The power consumption of volistor logic is computed and compared with the power consumption of stateful logic using the simulation results obtained by LTSpice-when implemented in a 1×8 or an 8×1 crosspoint array, volistors consume significantly less power.

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Section: Hybrid Computation In a Crossbar Arraymentioning

confidence: 99%

Memristor-Based Volistor Gates Compute Logic with Low Power Consumption

2016

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“…Such gates, which are externally binary and internally ternary, allow for efficient realization of the "always-present" mirror circuits, and are also especially good for LNNM model [24]. By using ancilla qubits the circuit can be minimized and some subfunctions can be shared between outputs [22]. The advantages of such approach are more clear with the Wang's realization of Toffoli gates.…”

Section: New Directions In Synthesismentioning

confidence: 99%

Synthesis of reversible circuits: A view on the state-of-the-art

Kerntopf

Perkowski

Podlaski

2012

2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO)

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Four main approaches to synthesis of reversible circuits are considered: cycle-based, transformation-based, ESOP-based and BDD-based as well as their advantages and disadvantages are discussed. It is indicated that the decisions in them are based on local information only what leads to very redundant designs. Suggestions for making global decisions are also presented. New directions of research are also described.Index Terms -quantum circuits, reversible logic synthesis I, INTRODUCTIONA gate (circuit) is called reversible if there is a one-to one correspondence between its input and output vectors. Research on reversible logic circuits is motivated mainly by possible applications in quantum computing. Work is in progress to efficiently use the potential of the quantum theory of computation over its classical counterpart and hence there is a need of building quantum computing hardware. Large parts of quantum circuits are built exclusively of reversible gates which should be realized in an optimal way [5, 7], Therefore, recently, synthesis of reversible logic circuits is an intensively studied area of research. During the last 10 years many new ideas and algorithms have been developed. However, the problem of finding optimal (i.e. exact minimal) or even sub-optimal design has not been solved yet in the satisfactory manner from the practical point of view. In the paper we show what is the reason that even the most successful approaches fail to solve the above formulated problem,The paper is organized as follows. Section II recalls basic concepts of reversible logic. Section III presents our point of view on main approaches to synthesis. In Section IV experimental results are described to back our evaluation of the state-of-the-art of reversible logic synthesis. Section V presents new directions in synthesis. Section VI summarizes the paper and presents suggestions for future research.

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