An approach to reduce build up layers for flip chip-ball grid array (FC-BGA) substrates

Nishio, Toshiyuki; Kazushige, K.; Yamaji, Y.; Takahashi, Nobuaki; Masanori, K.; Malfatt, R. S.

doi:10.1109/iemt.2003.1225889

IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003.

DOI: 10.1109/iemt.2003.1225889

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An approach to reduce build up layers for flip chip-ball grid array (FC-BGA) substrates

Toshiyuki Nishio

K. Kazushige

Y. Yamaji

et al.

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An approach to reduce build up layers for flip chip-ball grid array (FC-BGA) substrates

Cited by 0 publications

References 1 publication

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