An Approach for Generating the Self-Checking Test-Bench

Abstract

To verify the complex functionalities for an IP core or testing of critical IP core under module level testing giving more complexity at the time of simulation to analysis the output at accurate level due this fact, the engineer takes more time to finalize the outputs at different level. Due to that, the complexity of IP core at market level gets down. Complex critical functionalities and to verify the IP core as per Do-254, in any case, confirmation of necessities by test during board testing is challenging and time-consuming in some cases like normal, boundary and robustness test benches. This paper clarifies the critical functionalities with one of technique i.e. self checking test bench, and gives proposals how to beat them. The efficiency of the self-checking test bench is demonstrated with FIFO as case study.