An analytical model for the performance evaluation of multistage interconnection networks with two class priorities

Garofalakis, John; Stergiou, Eleftherios

doi:10.1016/j.future.2012.05.014

Cited by 9 publications

(9 citation statements)

References 14 publications

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“…The given algorithm has been implemented for heterogeneous networks. Multistage interconnection network is another class of networks that has been studied for both evaluations of architectures as well as for handling of task scheduling [11]. Simulator is the key to evaluate the simulation performance of an interconnection network.…”

Section: Related Workmentioning

confidence: 99%

A Simulation Model for the Performance Evaluation of Hybrid Interconnection Architectures

Samad

2018

ijarcs

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Efficient scheduling of tasks in multiprocessor interconnection networks is of primary importance for parallel execution. In this paper a new scheduling algorithm that schedules the tasks on different networks of processors is proposed and evaluated. The objective is the effective utilization of resource (processors) to execute tasks of an application. Processor networks have been used in the form of different topologies. We consider a new class of architecture known as linearly extensible multiprocessor networks which are best suited with lesser number of processors. Performance of different multiprocessor networks with the proposed algorithm as well as with other standard scheduling algorithms is evaluated in terms of performance parameters namely load balance error and execution time. Simulation results show that the linear architectures achieve better performance with the proposed scheduling scheme as compared to other considered scheduling algorithms.

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Section: Related Workmentioning

confidence: 99%

A Simulation Model for the Performance Evaluation of Hybrid Interconnection Architectures

Samad

2018

ijarcs

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“…In the field of MLMINs, the performance parameters such as throughput, delay, blocking probability, to name a few, have been adequately analyzed in previous works [15,16,[18][19][20][45][46][47][48][49]. All of the previous analyses reflect the fact that multilayer MINs have a great potential in terms of key performance parameters, especially the throughput and delay.…”

Section: Reliability Analysis On Banyan-type Mins Typically Banyan Nmentioning

confidence: 99%

“…MINs provide a compromise between the above networks since they present efficient performance using a reasonable number of switches [8,9]. Therefore, so far, a large number of researches have been done on MINs [10][11][12][13][14][15][16].…”

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confidence: 99%

Formulating broadcast reliability equations on multilayer multistage interconnection networks

Bistouni

Jahanshahi

2015

J Supercomput

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A non-negligible demand on today's modern interconnection networks is to deliver multicast traffic. One of the new ideas to cope with this problem is to use the multilayer multistage interconnection networks (MLMINs). On the other hand, another critical parameter to prove the performance of most systems is reliability. Therefore, in this paper, our focus is to formulate the reliability equations on MLMINs to achieve two objectives: First, development of analytical methods using reliability equations to present an exact solution for computing the reliability of MLMINs, second, preparing a basis for calculating the optimal values for topological parameters of MLMINs

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“…When a message or packet header reaches an intermediate switch, a switching mechanism determines how and when the router switch is set; that is, the input channel is connected to the output channel selected by the routing algorithm. In other words, the switching mechanism determines how network resources are allocated for message transmission [10,14,[16][17][18][19].…”

Section: Introductionmentioning

confidence: 99%

Scalable crossbar network: a non-blocking interconnection network for large-scale systems

Bistouni

Jahanshahi

2014

J Supercomput

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Interconnection networks (INs) are used in wide applications of multiprocessor systems in order to set up connections between various nodes such as processors and memory modules. However, there is a fundamental problem in INs that has always been considered as one of the most challenging issues in this area. Blocking problem in these networks degrades network performance and consequently the performance of the whole system. In the meantime, the main option for dealing with this problem is the use of non-blocking crossbar networks. However, there are engineering and scaling difficulties when using these networks in large-scale systems. The number of pins on a VLSI chip cannot exceed a few hundreds, which restricts the size of the largest crossbar that should be integrated into a single VLSI chip. Using the idea of multistage implementation of crossbar network can resolve the problem. However, the next problem that arises with this idea is high hardware cost. Therefore, in this paper, a new implementation of crossbar network named scalable crossbar network (SCN) that is a non-blocking network is presented to cope with the aforementioned scaling problems. In addition, performance analysis results show that SCN outperforms multistage crossbar networks and multistage interconnection networks in terms of terminal reliability, mean time to failure, and system failure rate.

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An analytical model for the performance evaluation of multistage interconnection networks with two class priorities

Cited by 9 publications

References 14 publications

A Simulation Model for the Performance Evaluation of Hybrid Interconnection Architectures

A Simulation Model for the Performance Evaluation of Hybrid Interconnection Architectures

Formulating broadcast reliability equations on multilayer multistage interconnection networks

Scalable crossbar network: a non-blocking interconnection network for large-scale systems

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