An Analytical Cache Performance Evaluation Framework for Embedded Out-of-Order Processors Using Software Characteristics

Abstract

Utilizing analytical models to evaluate proposals or provide guidance in high-level architecture decisions is been becoming more and more attractive. A certain number of methods have emerged regarding cache behaviors and quantified insights in the last decade, such as the stack distance theory and the memory level parallelism (MLP) estimations. However, prior research normally oversimplified the factors that need to be considered in out-of-order processors, such as the effects triggered by reordered memory instructions, and multiple dependences among memory instructions, along with the merged accesses in the same MSHR entry. These ignored influences actually result in low and unstable precisions of recent analytical models. By quantifying the aforementioned effects, this article proposes a cache performance evaluation framework equipped with three analytical models, which can more accurately predict cache misses, MLPs, and the average cache miss service time, respectively. Similar to prior studies, these analytical models are all fed with profiled software characteristics in which case the architecture evaluation process can be accelerated significantly when compared with cycle-accurate simulations. We evaluate the accuracy of proposed models compared with gem5 cycle-accurate simulations with 16 benchmarks chosen from Mobybench Suite 2.0, Mibench 1.0, and Mediabench II. The average root mean square errors for predicting cache misses, MLPs, and the average cache miss service time are around 4%, 5%, and 8%, respectively. Meanwhile, the average error of predicting the stall time due to cache misses by our framework is as low as 8%. The whole cache performance estimation can be sped by about 15 times versus gem5 cycle-accurate simulations and 4 times when compared with recent studies. Furthermore, we have shown and studied the insights between different performance metrics and the reorder buffer sizes by using our models. As an application case of the framework, we also demonstrate how to use our framework combined with McPAT to find out Pareto optimal configurations for cache design space explorations.

Analytical Modeling the Multi-Core Shared Cache Behavior With Considerations of Data-Sharing and Coherence

“…If the stack distance is no less than associativity, which indicates a cache miss, we accumulate 1 on the corresponding memory address in AAD. To make a trade off between space/time overheads and accuracies, we choose to cut of the profiled L1 reuse/stack distances at 1024 and accumulate the number of references with larger reuse distances to the reuse distance bar of 1024, which is also applied in the work of [11,12,13,16]. The RST, Hit-RDH and AAD updating procedures are just attached to the progress of RDH and SDH profiling.…”

“…By accumulating all the migrated references from each higher bar (𝑎𝑎𝑎𝑎 > 𝑖𝑖 ) in 𝑀𝑀𝑖𝑖𝑎𝑎𝑎𝑎𝑅𝑅𝐴𝐴𝐻𝐻(𝑎𝑎𝑎𝑎), we can obtain the adjusted 𝐿𝐿2𝑅𝑅𝐴𝐴𝐻𝐻(𝑖𝑖) as shown in Eq. (16).…”

“…The validation of integration of the upstream cache model and the shared cache model includes validating the accuracy of L1 private cache coherence misses and L2 shared cache miss rate. We validate the integrated model framework against gem5 simulations [16] with PARSEC 2.1. We choose 10 programs in PARSEC to run on four hardware configurations in a dualcore architecture.…”

Fast modeling L2 cache reuse distance histograms using combined locality information from software traces

“…Based on this method, we can get the reuse distance and the stack distance for each memory reference and construct the table. More details about the extraction of the reuse distance and the stack distance could be found in [9] [14]. Another metric introduced in this paper, called Hit-RDH, is also a two-dimensional matrix.…”

A Gaussian Set Sampling Model for Efficient Shared Cache Profiling on Multi-Cores

“…Analytical models typically provide insights on program behavior for performance prediction. However, most models oversimplify the factors to facilitate analysis [9]. Simulation-based methods have the advantages of flexibility, but suffer from long simulation time.…”