An analytical avalanche breakdown model for double gate MOSFET

Cho, Edward Namkyu; Shin, Young-Han; Yun, Ilgu

doi:10.1016/j.microrel.2014.08.019

Cited by 4 publications

(3 citation statements)

References 15 publications

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“…Multiple gate MOSFET is the structure that is able to reduce the above-mentioned short channel effects by improving the control ability of the carrier through positioning more than 2 gate terminals around the channel which can control the flow of carrier within the channel [4]. It is divided into tri-gate structure such as FinFET structure [5], double gate structure [6], and cylindrical structure [7], according to the methods of positioning the gate terminals around the channel. It is known that the structures are different but the basic operations are same.…”

Section: Introductionmentioning

confidence: 99%

Threshold voltage roll-off for sub-10 nm asymmetric double gate MOSFET

Jung¹

2019

IJECE

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Threshold voltage roll-off is analyzed for sub-10 nm asymmetric double gate (DG) MOSFET. Even asymmetric DGMOSFET will increase threshold voltage roll-off in sub-10 nm channel length because of short channel effects due to the increase of tunneling current, and this is an obstacle against the miniaturization of asymmetric DGMOSFET. Since asymmetric DGMOSFET can be produced differently in top and bottom oxide thickness, top and bottom oxide thicknesses will affect the threshold voltage roll-off. To analyze this, <em>thermal</em><em> </em>emission current and tunneling current have been calculated, and threshold voltage roll-off by the reduction of channel length has been analyzed by using channel thickness and top/bottom oxide thickness as parameters. As a result, it is found that, in short channel asymmetric double gate MOSFET, threshold voltage roll-off is changed greatly according to top/bottom gate oxide thickness, and that threshold voltage roll-off is more influenced by silicon thickness. In addition, it is found that top and bottom oxide thickness have a relation of inverse proportion mutually for maintaining identical threshold voltage. Therefore, it is possible to reduce the leakage current of the top gate related with threshold voltage by increasing the thickness of the top gate oxide while maintaining the same threshold voltage.

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Section: Introductionmentioning

confidence: 99%

Threshold voltage roll-off for sub-10 nm asymmetric double gate MOSFET

Jung¹

2019

IJECE

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“…However, despite all this development, MOSFET transistors have suffered from the serious effects of the Short Channel Effect (SCE) on her electrical behavior [2,3]; this necessarily affects the characteristics of CMOS integrated circuits. In order to reduce this influence, Double-Gate (DG) structure, has been proposed as a promising solution to replace the conventional MOSFET structure in nanoscale technology [3][4][5]. Having two gates ensures excellent control of short channel effects (SCE) and improves the capacity of the control of the current through control of the channel.…”

Section: Introductionmentioning

confidence: 99%

A high electrical performance of DG-MOSFET transistors in 4H-SiC and 6H-SiC 130 nm technology by BSIM3v3 model

Hebali

Bennaoum

Berka

et al. 2019

Journal of Electrical Engineering

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In this paper, the electrical performance of double gate DG-MOSFET transistors in 4H-SiC and 6H-SiC technologies have been studied by BSIM3v3 model. In which the I–V and gm–V characteristics and subthreshold operation of the DGMOSFET have been investigated for two models (series and parallel) based on equivalent electronic circuits and the results so obtained are compared with the single gate SG-MOSFET, using 130 nm technology and OrCAD PSpice software. The electrical characterization of DG-MOSFETs transistors have shown that they operate under a low voltage less than 1.2 V and low power for both models like the SG-MOSFET transistor, especially the series DG-MOSFET transistor is characterized by an ultra low power. The different transistors are characterized by an ultra low OFF leakage current of pA order, very high ON/OFF ratio of and high subthreshold slope of order 0.1 V/dec for the transistors in 6H-SiC and 4H-SiC respectively. These transistors also proved higher transconductance efficiency, especially the parallel DG-MOSFET transistor.

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“…Multiple gate MOSFET is the structure that is able to reduce the above-mentioned short channel effects by improving the control ability of the carrier through positioning more than 2 gate terminals around the channel which can control the flow of carrier within the channel [2]. It is divided into tri-gate structure such as FinFET structure [3], double gate structure [4], and cylindrical structure [5], according to the methods of positioning the gate terminals around the channel. It is known that the structures are different but the basic operations are same.…”

Section: Introductionmentioning

confidence: 99%

Threshold Voltage Roll-off by Structural Parameters for Sub-10 nm Asymmetric Double Gate MOSFET

Jung

2018

TELKOMNIKA

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This study is to analyze threshold voltage roll-off according to structural parameters of sub-10 nm asymmetric double gate MOSFET. In case of sub-10nm channel length, because of short channel effects resulting from the rapid increase of tunneling current, even asymmetric double gate (DG) MOSFET, which has been developed for reducing short channel effects, will increase threshold voltage roll-off, and this is an obstacle against the miniaturization of asymmetric DGMOSFET. Especially, since asymmetric DGMOSFET can be produced differently in top and bottom oxide thickness, top/bottom oxide thickness will affect the threshold voltage roll-off. To analyze this, thermal emission current and tunneling current model have been calculated, and threshold voltage roll-off in accordance with the reduction of channel length has been analyzed by using channel thickness and top/bottom oxide thickness as parameters. As a result, it is found that, in short channel asymmetric double gate MOSFET, threshold voltage roll-off is changed greatly according to top/bottom gate oxide thickness, and that threshold voltage roll-off, in particular, is generated more greatly according to silicon thickness. In addition, it is found that top and bottom oxide thickness have a relation of inverse proportion mutually for maintaining identical threshold voltage.

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An analytical avalanche breakdown model for double gate MOSFET

Cited by 4 publications

References 15 publications

Threshold voltage roll-off for sub-10 nm asymmetric double gate MOSFET

Threshold voltage roll-off for sub-10 nm asymmetric double gate MOSFET

A high electrical performance of DG-MOSFET transistors in 4H-SiC and 6H-SiC 130 nm technology by BSIM3v3 model

Threshold Voltage Roll-off by Structural Parameters for Sub-10 nm Asymmetric Double Gate MOSFET

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