2015
DOI: 10.1541/ieejeiss.135.769
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An Analysis of False Turn-On Mechanism on Semiconductor Devices

Abstract: This paper analyzes the gate noise performance using simulation and experimental test focused on parasitic inductances of power semiconductor devices' terminals. The gate noise which is over the threshold voltage makes non-active FETs turn on and leads the FETs to a breakdown. Next generation devices which have very high speed switching characteristic are difficult to be dealt with due to the false turn-on problem. The false turn-on mechanism in conventional theory is related to parasitic capacitors and a gate… Show more

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Cited by 2 publications
(1 citation statement)
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“…There are some reports on false triggering also with considering the parasitic inductances but they are discussed on the basis of the conventional theory [4,5]. This letter discusses false‐triggering mechanism based on our novel assumption with experimental points of view [6].…”
Section: Introductionmentioning
confidence: 99%
“…There are some reports on false triggering also with considering the parasitic inductances but they are discussed on the basis of the conventional theory [4,5]. This letter discusses false‐triggering mechanism based on our novel assumption with experimental points of view [6].…”
Section: Introductionmentioning
confidence: 99%