An analysis of bipolar breakdown and its application to the design of ESD protection circuits

Compact distributed multi-finger MOSFET model for circuit-level ESD simulation

“…(12) is evaluated in the limiting case that I D is very large (I D → ∞). Under this condition, r e ≪ R S , r μ ≈ 0, and M · α approaches 1 [28]. The resultant R on1 is given by the expression in Eq.…”

“…Simulation accurately represents the I-V curves and V t1 as functions of gate bias, except in the case that only one finger of the device is triggered on, which is elaborated on in the following sections. V GS modulates the impact ionization generated body current which, in turn, provides the base current for the parasitic LNPN [6,28]; snapback occurs when the LNPN turns on. Accurate modeling of V GS (V t1 ) is critical for designing gate-coupled MOSFET protection circuits and active rail clamp protection circuits [1].…”

ESD design challenges in state-of-the-art analog technologies

“…HV bipolar devices have been extensively studied in literature [23][24][25][26][27][28][29]. The main reason resides in the ability to exactly tailor triggering and holding voltages, while featuring excellent failure currents (>5 mA/lm).…”

ESD Power Clamps

“…Bipolar ESD power clamps can be initiated using different triggering methods [39][40][41][42][43][44][45][46][47][48][49]. These can include frequency-triggering, capacitance-coupling triggering, and voltagetriggering.…”

“…ESD power clamps popularity occurred in the 1990s to achieve better ESD results in semiconductor chips [1][2][3][4][5][6]. By mid 1990s, diode string [3][4][5][6][7][8][9][10][11][12][13][14][15][16][17], 3,[20][21][22][23][24][25][26][27], and bipolar ESD power clamps [43][44][45][46][47][48][49], and silicon-controlled rectifiers [50-60] became part of the ESD design methodology and practice. From 1995 to 2005, the focus on the MOSFET ESD power clamps have been on producing a better ESD power clamp, design integration, physical placement [33][34][35][36], and low leakage [38].…”