An analog front-end IC with regulated R-I amplifier and CDS CTIA for microbolometer

Seo, Jindeok; Kim, Gyungtae; Lim, Kyomuk; Kim, Hyunho; Im, Seunghyun; Kim, Ji-Hoon; Kim, Choul‐Young; Ko, Hyoungho

doi:10.1109/iccas.2013.6704156

Cited by 6 publications

(4 citation statements)

References 4 publications

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“…Fig. 6 compares results from the column readout circuit with and without CDS corresponding to the prior works of [7,8] and [9,10] respectively with these from the dual integration CDS which significantly reduces the levels of all types of pattern noise. When compared with those without CDS, the conventional CDS reduces 67% and 52% of the CN and CFPN respectively, but increases 31%, 205%, and 80% of RN, PN, and TN respectively.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…In Fig. 2 [7,8,9, 10], the sensing current (I INT ) is generated by the active microbolometer with a resistance of R S , blind microbolometers with resistances R B and R C . The R B provides the zero point of I INT through I B .…”

Section: Types Of Noisementioning

confidence: 99%

“…However, it cannot be directly utilized in an infrared imager due to the different structure at the pixel unit and column readout circuit. The CDS function for infrared imager was discussed in [7,8], but it only reduces 1=f noise of an amplifier for integrator that is a part of CN and CFPN. In this paper, we propose a dual integration CDS in order to address all the components of pattern noise in an infrared image.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Column readout circuit with dual integration CDS for infrared imagers

Park

Yang

Ahn

et al. 2016

IEICE Electron. Express

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A column readout circuit with proposed dual integration CDS for low pattern noise infrared imager is presented. By using an extra integration, the dual integration CDS effectively reduces the level of column and row noise (CN and RN) and column fixed pattern noise (CFPN) in an infrared image. In addition, a time flexible integration technique minimizes the penalty of readout time by a dual operation. Simulation of a 0.18 µm CMOS implementation suggests that CN can be reduced by 68%, RN by 71%, and CFPN by 95% compared with a column readout circuit with conventional CDS.

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Section: Simulation Resultsmentioning

confidence: 99%

Section: Types Of Noisementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Column readout circuit with dual integration CDS for infrared imagers

Park

Yang

Ahn

et al. 2016

IEICE Electron. Express

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“…In addition, various readout integrated circuits (ROICs) for bolometer-type uncooled infrared image sensors using a standard CMOS process have been developed [12,13,14]. Among the various ROICs, the capacitive transimpedance amplifier (CTIA) is widely used to detect the signal output current of pixels [15]. The bolometer sensor based on micromachining technology is compatible with the standard CMOS process, but low linearity and high noise are disadvantages.…”

Section: Introductionmentioning

confidence: 99%

Averaging Pixel Current Adjustment Technique for Reducing Fixed Pattern Noise in the Bolometer-Type Uncooled Infrared Image Sensor

Kim

Choi

Lee

et al. 2019

Sensors

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In this paper, we propose an averaging pixel current adjustment technique for reducing fixed pattern noise (FPN) in the bolometer-type uncooled infrared image sensor. The averaging pixel current adjustment technique is composed of active pixel, reference pixel, and calibration circuit. Polysilicon resistors were used in each active pixel and reference pixel. Resistance deviation among active pixels integrated with the same resistance value cause FPN. The principle of the averaging pixel current adjustment technique for removing FPN is based on the subtraction of dark current of the active pixel from the dark current of the reference pixel. The subtracted current is converted into the voltage, which contains pixel calibration information. The calibration circuit is used to adjust the calibration current. After calibration, the nano-ampere current is output with small deviation. The proposed averaging pixel current adjustment technique is implemented by a chip composed of a pixel array, a calibration circuit, average current generators, and readout circuits. The chip was fabricated using a standard 0.35 μm CMOS process and its performance was evaluated.

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A Low-Noise CTIA-based pixel with CDS for SWIR Focal Plane Arrays

Zhuo

et al. 2021

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)

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An analog front-end IC with regulated R-I amplifier and CDS CTIA for microbolometer

Cited by 6 publications

References 4 publications

Column readout circuit with dual integration CDS for infrared imagers

Column readout circuit with dual integration CDS for infrared imagers

Averaging Pixel Current Adjustment Technique for Reducing Fixed Pattern Noise in the Bolometer-Type Uncooled Infrared Image Sensor

A Low-Noise CTIA-based pixel with CDS for SWIR Focal Plane Arrays

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