An Alternative to Error Correction for SRAM-Like PUFs

Hofer, Maximilian; Boehm, Christoph

doi:10.1007/978-3-642-15031-9_23

Cited by 34 publications

(16 citation statements)

References 12 publications

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“…One proposed approach to combat unstable bits is to place more PUFs than needed, and add ADC circuitry to automatically select the most stable ones [18]. Unfortunately, this approach is not practical for FPGA-based studies since there is generally no flexible way to measure the analog aspect of an internal signal.…”

Section: Sram Pufmentioning

confidence: 99%

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Mills

Vyas

Patterson

et al. 2012

2012 IEEE 30th International Conference on Computer Design (ICCD)

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Section: Sram Pufmentioning

confidence: 99%

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Mills

Vyas

Patterson

et al. 2012

2012 IEEE 30th International Conference on Computer Design (ICCD)

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“…Their proposed technique controls the reliability by further injecting aging to the SRAM arrays after achieving target uniformity. Hofer et al proposed a technique that selects cells that provide a high mismatch between their crucial transistors are selected for lowering the error rate [13]. The robustness of DRV-based SRAM PUF was proposed in [45].…”

Section: Related Workmentioning

confidence: 99%

Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation

et al. 2017

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A physical unclonable function (PUF) is a structure that produces a unique response, with an issued challenge (input), which can be used as an identifier or a cryptographic key. SRAM PUFs create unique responses upon power up as certain SRAM cells output a "1" or "0" with high probability due to uncontrollable process variations. A current challenge in SRAM PUFs is their sensitivity to temperature and voltage variations as well as aging. It is always challenging to make SRAM PUFs reliable and unique with algorithms that isolate stable and uncorrelated bits quickly with minimal testing (enrollment). In this paper, we explore the selection of stable and uncorrelated bits through enrollment under different conditions (temperature and voltage) and also by exploiting previously undiscovered interactions between neighboring SRAM cells. We propose University of Connecticut, Storrs, CT, USA neighbor influenced cell selection algorithm (NICSA) with the help of metrics that analyze the impact of each neighboring cell and each enrollment condition. The proposed NICSA helps to identify the "best" cells and conditions for stable bit selection. Besides reliability, SRAM PUF can be less unique due to systematic correlation among chips. We study the systematic correlation between SRAMs power-up values to find the uncorrelated cells among chips for better uniqueness. We have analyzed data from 5 ISSI, 3 IDT, and 3 Cypress SRAMs and our metrics identify the best neighborhood size (16 stable neighbors) and best enrollment condition pair high temperature, high voltage, and low temperature for NICSA.

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“…Once the difference has been sufficiently amplified, the differential outputs are latched to generate stable bits. Hofer et al have proposed an alternative to error correction by pre-selecting the bit with greater mismatch to reduce error rate [21]. Böhm et al implemented an SRAM PUF on a microcontroller and combined it with simple repetition codes to reduce the error rates.…”

Section: Circuit and Manufacturing Technology Solutionsmentioning

confidence: 99%

On Improving Reliability of SRAM-Based Physically Unclonable Functions

Vijayakumar

Patil

Kundu

2017

JLPEA

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Physically unclonable functions (PUFs) have been touted for their inherent resistance to invasive attacks and low cost in providing a hardware root of trust for various security applications. SRAM PUFs in particular are popular in industry for key/ID generation. Due to intrinsic process variations, SRAM cells, ideally, tend to have the same start-up behavior. SRAM PUFs exploit this start-up behavior. Unfortunately, not all SRAM cells exhibit reliable start-up behavior due to noise susceptibility. Hence, design enhancements are needed for improving reliability. Some of the proposed enhancements in literature include fuzzy extraction, error-correcting codes and voting mechanisms. All enhancements involve a trade-off between area/power/performance overhead and PUF reliability. This paper presents a design enhancement technique for reliability that improves upon previous solutions. We present simulation results to quantify improvement in SRAM PUF reliability and efficiency. The proposed technique is shown to generate a 128-bit key in ≤0.2 µs at an area estimate of 4538 µm 2 with error rate as low as 10 −6 for intrinsic error probability of 15%.

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An Alternative to Error Correction for SRAM-Like PUFs

Cited by 34 publications

References 12 publications

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation

On Improving Reliability of SRAM-Based Physically Unclonable Functions

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