An adaptive digital background calibration technique using variable step size LMS for pipelined ADC

Homogeneity Enforced Calibration of Stage Nonidealities for Pipelined ADCs

“…Additionally, many signal processing systems include a micro controller unit (MCU) after the ADC. In this case, the proposed calibration technique supports an implementation of the update equation ( 11) on the MCU, eliminating the need for a hardware implementation of (11). However, simulations have shown, that to achieve results as presented in the following section, the implementation of (11) requires a minimum number of 12 bits.…”

“…To obtain practical boundaries on the step-size, an alternative way is pursued in the following. Subtracting the MMSE solution from both sides of (11), and denoting e[k] = θ[k] − θ 0 , allows rewriting (11) as…”

“…A crucial part of calibration techniques is the identification of the ADC nonidealities [4]. Typically, this requires either long test times [5]- [7], exceedingly linear test signal generators (SGs) [8], [9], or additional hardware components [10], [11]. Much effort was spent to overcome the need of a highly linear M. Wagner, O. Lang and M. Huemer are with the Institute of Signal Processing, Johannes Kepler University, Linz, Austria (e-mail: matthias.wagner@jku.at) T. Bauernfeind is with Infineon Technologies Linz GmbH & Co. KG, Austria…”

“…The equation above shows, that nonidealities in less significant stages marginally affect the overall ADC output because they are weighted with the inverse product of all previous stage gains. Consequently, sufficient calibration performances for many applications might be achieved by considering only the most significant stages [11], [17]. Additionally, (7) shows that ζ i ̸ = 0 distorts the transition function by a remaining stage quantization error.…”