An Adaptive Cache Coherence Protocol Optimized For Migratory Sharing

Stenström, Per; Brorsson, Mats; Sandberg, L.

doi:10.1109/isca.1993.698551

Cited by 23 publications

(36 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The original techniques for detecting migratory sharing [4,5] were both dynamic, data-centric schemes. We will in this paper evaluate the technique proposed by Stenström et al [5] which works as follows.…”

Section: Data-centric Load-store Optimizationmentioning

confidence: 99%

“…Several previous studies have proposed and explored techniques for detecting migratory sharing [4][5][6]. These techniques have been shown to reduce the amount of global write messages substantially for scientific/engineering applications dominated by migratory sharing, but have never been applied to database applications or operating systems.…”

Section: Introductionmentioning

confidence: 99%

“…If it somehow could be known at the load that there is an upcoming store to the same block, the global read message could be combined with an exclusive request which combines the invalidation with the fetching of data. The following write to the block could then be performed locally, thereby reducing network traffic and write latency [4,5].…”

Section: Introductionmentioning

confidence: 99%

“…While we know from a number of previous studies that blocks exhibiting migratory sharing can be handled more effectively in shared-memory multiprocessors [4][5][6]10], such improvements can be even more general. All load-store sequences can potentially benefit from a mechanism that loads the block exclusively into the cache already at the initial load instruction.…”

Section: Introductionmentioning

confidence: 99%

“…Optimizing for load-store sequences and migratory data can affect performance in two major ways: as a direct decrease in write stall time, and as decreased network traffic [5]. The decrease in write stall time is most prominent in processors with a sequential memory consistency model [11], as write stall time is hidden to a larger extent in processors employing weaker consistency models [12].…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Improving performance of load-store sequences for transaction processing workloads on multiprocessors

Nilsson

Dahlgren

Proceedings of the 1999 International Conference on Parallel Processing

View full text Add to dashboard Cite

On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the database server and the operating system. One contributing source is a large amount of load-store sequences in the program, resulting in many read misses as well as much global invalidation traffic.In this paper, we characterize the nature of these loadstore sequences, and analyze contributing code-and data structures in the database handler, operating system, and system libraries. We explore two conceptually different approaches for detecting load-store sequences; data-centric and instruction-centric, and the goal is to load the cache block exclusively already at the load instruction so that the store instruction can perform locally. Our results were obtained using program-driven simulation of a TPC-B based workload on a four-node multiprocessor.The results show that there is a substantial amount of load-store sequences in the database handler, the operating system, and in system libraries, and about 40% of all global writes belong to such sequences. Even though the techniques were able to reduce the execution time for the application by up to 10%, the complex behavior of the database workload reduced the effectiveness of traditional optimization techniques for migratory sharing.

show abstract

Section: Data-centric Load-store Optimizationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Improving performance of load-store sequences for transaction processing workloads on multiprocessors

Nilsson

Dahlgren

Proceedings of the 1999 International Conference on Parallel Processing

View full text Add to dashboard Cite

show abstract

Adaptive protocols for software distributed shared memory

et al. 1999

View full text Add to dashboard Cite

We demonstrate the bene ts of software shared memory protocols that adapt at run-time to the memory access patterns observed in the applications. This adaptation is automatic | no user annotations are required | and does not rely on compiler support or special hardware. We investigate adaptation b e t ween single-and multiple-writer protocols, dynamic aggregation of pages into a larger transfer unit, and adaptation b e t ween invalidate and update. Our results indicate that adaptation b e t ween single-and multiple-writer and dynamic page aggregation are clearly bene cial. The results for the adaptation b e t ween invalidate and update are less compelling, showing at b e s tgains similar to the dynamic aggregation adaptation and at worst serious performance deterioration.

show abstract

Software DSM protocols that adapt between single writer and multiple writer

Amza

Cox

Dwarkadas

et al.

Proceedings Third International Symposium on High-Performance Computer Architecture

View full text Add to dashboard Cite

We present t wo s o f t ware DSM protocols that dynamically adapt between a single writer (SW) and a multiple writer (MW) protocol based on the application's sharing patterns. The rst protocol (WFS) adapts based on write-write false sharing the second (WFS+WG) based on a combination of write-write false sharing and write granularity. The adaptation is automatic. No user or compiler information is needed. The choice between SW and MW is made on a perpage basis. We measured the performance of our adaptive protocols on an 8-node SPARC cluster connected by a 155 Mbps ATM network. We used eight applications, covering a broad spectrum in terms of write-write false sharing and write granularity. W e compare our adaptive protocols against the MW-only and the SWonly approach. Adaptation to write-write false sharing proves to be the critical performance factor, while adaptation to write granularity p l a ys only a secondary role in our environment and for the applications considered. Each of the two adaptive protocols matches or exceeds the performance of the best of MW and SW in seven out of the eight applications. For these applications, speedup improvements over SW range from 1.02 to 2.7. The largest improvements over SW occur for applications with high write-write false sharing. Compared to MW, speedups improve b y a factor of 1.02 to 1.6, with the largest improvements occurring for applications with little or no write-write false sharing. Both WFS and WFS+WG speedups fall below the best of MW and SW for one application, but only by a factor of 1.09 and 1.06. In addition, memory usage is reduced considerably compared to MW, in some cases making the memory overhead all but negligible.

show abstract

An Adaptive Cache Coherence Protocol Optimized For Migratory Sharing

Cited by 23 publications

References 19 publications

Improving performance of load-store sequences for transaction processing workloads on multiprocessors

Improving performance of load-store sequences for transaction processing workloads on multiprocessors

Adaptive protocols for software distributed shared memory

Software DSM protocols that adapt between single writer and multiple writer

Contact Info

Product

Resources

About