2019
DOI: 10.1109/jssc.2019.2936756
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An Acoustic Signal Processing Chip With 142-nW Voice Activity Detection Using Mixer-Based Sequential Frequency Scanning and Neural Network Classification

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Cited by 38 publications
(28 citation statements)
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“…This is because the center frequency of the BPF is controlled by the frequency of an external clock, rather than g m of the transconductors, therefore ω 0 can be precisely controlled over process, voltage, and temperature (PVT) variations. A chopper-based mixer with a sequentially varying clock frequency and a subsequent LPF stage was used in [59] where its operational principle is similar to that of lock-in amplifiers, also commonly used in bio-impedance sensors [52], [70]. This architecture achieved a 60 nW ultra-low-power consumption, however, because it sequentially demodulates over the desired frequency band, it cannot perform the filtering operation over its entire frequency range at once.…”
Section: Discussionmentioning
confidence: 99%
“…This is because the center frequency of the BPF is controlled by the frequency of an external clock, rather than g m of the transconductors, therefore ω 0 can be precisely controlled over process, voltage, and temperature (PVT) variations. A chopper-based mixer with a sequentially varying clock frequency and a subsequent LPF stage was used in [59] where its operational principle is similar to that of lock-in amplifiers, also commonly used in bio-impedance sensors [52], [70]. This architecture achieved a 60 nW ultra-low-power consumption, however, because it sequentially demodulates over the desired frequency band, it cannot perform the filtering operation over its entire frequency range at once.…”
Section: Discussionmentioning
confidence: 99%
“…According to the state-ofthe-art ASICs for KWS and SV, the MFCC feature extraction occupies almost 40 % (~8 μW) of the total power consumption [6]. Furthermore, deep neural networks as recognition model prove useful for significant performance improvement [8]. However, massive computations and parameters are the bottlenecks of its low power implementation.…”
Section: Introductionmentioning
confidence: 99%
“…However, massive computations and parameters are the bottlenecks of its low power implementation. Although the power consumption of [7], [8] is ultra-low, they complete VAD and KWS containing only two classes.…”
Section: Introductionmentioning
confidence: 99%
“…It saves the total energy consumption or the average power consumption by reducing power in sleep mode for a long time; during that period the system does not need to be fully operated. The second solution is to develop low-power circuits both for active and sleep modes [18][19][20][21][22][23][24][25]. Lastly, the system includes an energy harvester to recharge the connected battery using environment energy [17].…”
Section: Introductionmentioning
confidence: 99%