An Accelerated LIF Neuronal Network Array for a Large-Scale Mixed-Signal Neuromorphic Architecture

Abstract

We present an array of leaky integrate-and-fire (LIF) neuron circuits designed for the second-generation BrainScaleS mixed-signal 65-nm CMOS neuromorphic hardware. The neuronal array is embedded in the analog network core of a scaleddown prototype HICANN-DLS chip. Designed as continuoustime circuits, the neurons are highly tunable and reconfigurable elements with accelerated dynamics. Each neuron integrates input current from a multitude of incoming synapses and evokes a digital spike event output. The circuit offers a wide tuning range for synaptic and membrane time constants, as well as for refractory periods to cover a number of computational models. We elucidate our design methodology, underlying circuit design, calibration and measurement results from individual subcircuits across multiple dies. The circuit dynamics match with the behavior of the LIF mathematical model. We further demonstrate a winner-take-all network on the prototype chip as a typical element of cortical processing. I . I N T R O D U C T I O NT HE architecture of digital microprocessors is fundamentally different from that of the central nervous system. While the brain is a massively parallel structure of neurons interconnected through synapses [1], microprocessors are mostly based on a von Neumann architecture [2], [3] with logic gates as the elementary primitives. The human brain consumes only approximately 20 W [4], while its performance as a generalpurpose problem solver is still unmatched by any computer algorithm.Taking inspiration from this biological feat, neuromorphic architectures not only adopt a non-von Neumann architecture by collocating memory close to the computational element, but also introduce massive parallelism, high energy efficiency, reconfigurability, fault tolerance, and integrate computational *Both authors contributed equally to this work.

Spiking Neural Networks Hardware Implementations and Challenges

“…A large amount of them have already been transposed onto hardware [11,20,31,73,198]. The Leaky Integrate and Fire (LIF) model has encountered a special interest among hardware designers [1,15,38,122], we thus discuss its working principle below. Fig.…”

Quantum computing with classical bits

“…We can therefore represent the observables σ µν by the operators L µν . The eigenvalues of L µν are ±1, corresponding to the possible measurement values σ µν = ±1 in the 2 15 states τ of the classical statistical ensemble. The quantum condition for the positivity of the density matrix requires now…”

“…Arbitrary SO(15)-rotations can be realized as unique jump operations in this case. This includes the SU (4) subgroup of SO(15) which is embedded in SO(15) such that the 15-dimensional fundamental representation of SO (15), that can be associated to e µν and ρ µν , transforms as the 15-dimensional adjoint representation of SU (4). The embedding is precisely provided by eq.…”

“…Since neural networks operate classically, this amounts to realizing quantum statistics by classical statistical systems. Neuromorphic computing [11][12][13][14][15][16][17], or computational steps in our brain, may also realize quantum operations based on classical statistics. Learning by evolution, living systems may be able to perform quantum computational steps without realizing conditions that are often assumed to be necessary for quantum mechanics, as the presence of small and well isolated systems or low temperature.…”

Event-Based Attention and Tracking on Neuromorphic Hardware

“…Neuromorphic processors emulate dynamics of biological spiking neurons in hardware and thus allow us to run spiking neural network architectures in real-time, with a small energy footprint, and in small form-factor devices, making them a promising computing platform for eventbased vision [7,8]. However, most neuromorphic devices target offline computation, with applications in either computational neuroscience [10,12] or data processing [9]. The Kapoho Bay -a USB-stick form-factor version of the Intel's latest neuromorphic research platform Loihi [8] -is among neuromorphic systems that offer a direct Address-Event Representation (AER) interface to event-based sensors [13].…”