An abacus turn model for time/space-efficient reconfigurable routing

Fu, Binzhang; Han, Yinhe; Ma, Jun; Li, Huawei; Li, Xiaowei

doi:10.1145/2000064.2000096

Cited by 70 publications

(26 citation statements)

References 42 publications

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“…Most of the routing algorithms use turn model or virtual channel based methodologies to achieve deadlock freedom. Many routing algorithms [2]- [5] exist in literature that use turn models for deadlock avoidance. The e-cube routing (XY routing) prohibits turn from Y dimension to X dimension as shown in Figure 1a.…”

Section: Related Workmentioning

confidence: 99%

CARM: Congestion Adaptive Routing Method for On Chip Networks

Kumar

Laxmi

Gaur

et al. 2014

2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems

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Abstract-Network-on-Chip (NoC) has emerged as a longterm and efficient on-chip communication solution for MCSoC and CMP micro-architectures to overcome bottleneck of traditional bus-based interconnects. Performance of NoC is highly dependent on routing algorithm we choose. In this paper, we present a highly adaptive and deadlock free routing algorithm for 2D mesh topology to mitigate congestion. Proposed algorithm provides a high degree of adaptiveness by allowing cycles in channel dependency graph and using one additional virtual channel along the Y dimension only. It uses all available minimal/non-minimal paths between source and destination nodes. A packet is routed along the non-minimal path only when minimal paths get congested at the neighboring nodes. Results show that proposed congestion-aware routing algorithm improves network performance by routing packets through non-congested areas.

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Section: Related Workmentioning

confidence: 99%

CARM: Congestion Adaptive Routing Method for On Chip Networks

Kumar

Laxmi

Gaur

et al. 2014

2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems

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“…Partially adaptive routing functions avoid deadlock by forbidding certain turns [6], [19], [21]. Due to the prohibition of east→south and north→west turns, negative-first routing can utilize all minimal paths when the X and Y positions of the destination are both positive or negative to the source.…”

Section: Offered Path Diversitymentioning

confidence: 99%

“…They re-allocate an output VC when the tail flit of last packet goes through the ST stage of current router, which is called aggressive VC reallocation. Instead, fully adaptive functions re-allocate an output VC only after the tail flit of last packet goes through the ST stage of next-hop router, which is called conservative VC re-allocation [13], [19]. The difference between these schemes is shown in Fig.…”

Section: Vc Re-allocation Schemementioning

confidence: 99%

“…Duato's theory is powerful for designing fully adaptive routing functions which allow all minimal paths for packet routing. Turn model functions avoid deadlock by offering only a subset of all minimal paths [6], [19], [21]. In addition to the offered path diversity, partially and fully adaptive functions differ in the VC re-allocation.…”

Section: Introductionmentioning

confidence: 99%

“…Partially adaptive routing can utilize an aggressive VC re-allocation scheme, while fully adaptive routing can only leverage a conservative scheme. VC re-allocation strongly impacts performance and cannot be overlooked in the design of routing algorithms [19], [37].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs

Jerger

Wang

et al. 2014

IEEE Trans. Comput.

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Abstract-To provide efficient, high-performance routing algorithms, a holistic approach should be taken. The key aspects of routing algorithm design include adaptivity, path selection strategy, VC allocation, isolation and hardware implementation cost; these design aspects are not independent. The key contribution of this work lies in the design of a novel selection strategy, Destination-Based Selection Strategy (DBSS) which targets interference that can arise in many-core systems running consolidation workloads. In the process of this design, we holistically consider all aspects to ensure an efficient design. Existing routing algorithms largely overlook issues associated with workload consolidation. Locally adaptive algorithms do not consider enough status information to avoid network congestion. Globally adaptive routing algorithms attack this issue by utilizing network status beyond neighboring nodes. However, they may suffer from interference, coupling the behavior of otherwise independent applications. To address these issues, DBSS leverages both local and non-local network status to provide more effective adaptivity. More importantly, by integrating the destination into the selection procedure, DBSS mitigates interference and offers dynamic isolation among applications. Results show that DBSS offers better performance than the best baseline selection strategy and improves the energy-delay product for medium and high injection rates; it is well suited for workload consolidation.

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Multipath routing algorithm for application‐specific wormhole NoCs

ZhuanSun

Chen

2017

Concurrency and Computation

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Adaptive routing designing for network-on-chip architecture is complicated to guarantee deadlock-free. In this paper, we present methodology to design efficient multi-path routing algorithms for specific application wormhole network-on-chip system to guarantee deadlock-free. The methodology presents an analytical model for overall average delay of wormhole network-on-chip by queueing theory and uses a linear programming-based methodology to minimize overall average delay. The methodology guarantees deadlock freedom by efficient branch-and-bound algorithm. Compared to other adaptive deadlock-free algorithms, results obtained through simulation show that the algorithms can potentially achieve better throughput and latency. KEYWORDS multi-path, network-on-chip, routing algorithms 1 opens new directions in the customization of the routing algorithms for the application. 14 Those literature 12,15,16 have proposed several deadlock-free routing algorithms without considering the information of the specific application traffic. They designed those routing algorithms under any type of traffic to guarantee the deadlock freedom of NoC system and improve good average performance. 17 Thus, they naturally assume that each nodes of the NoC system may communicate to each other node and all the source ejecting nodes have same ejecting traffic rate.However, we may get accurate information of the specific application traffic for the area of NoC system. 17 Furthermore, traditional routing algorithm for mesh topology is achieved at a high loss of adaptive. 2,12 A limitation of those routing algorithms is that they cannot ensure deadlock freedom for an irregular mesh topology in which cores could occupy more than one tile. 2

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An abacus turn model for time/space-efficient reconfigurable routing

Cited by 70 publications

References 42 publications

CARM: Congestion Adaptive Routing Method for On Chip Networks

CARM: Congestion Adaptive Routing Method for On Chip Networks

Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs

Multipath routing algorithm for application‐specific wormhole NoCs

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