An 8 b CMOS vector A/D converter

A low-power CMOS analog vector quantizer

“…In the evaluate phase, PRE is deactivated, and the minimum values are coupled to the output by activating LO. From (4), the resulting voltage outputs on the floating row lines are given by (5) The last term in (5) corresponds directly to the distance measure in (2). Notice that the negative sign in (5) could be reversed by interchanging clocks HI and LO, if needed.…”

“…The circuit implementation of the WTA function combines the compact sizing and modularity of a linear architecture as in [3], [11], and [12] with positive feedback for fast and decisive output settling independent of signal levels, as in [4] and [5]. Typical positive feedback structures for WTA operation use a logarithmic tree [5] or a fully interconnected network [4], with implementation complexities of order and , respectively, being the number of WTA inputs.…”

“…Typical positive feedback structures for WTA operation use a logarithmic tree [5] or a fully interconnected network [4], with implementation complexities of order and , respectively, being the number of WTA inputs. The present implementation features an complexity in a linear structure by means of globalized positive feedback, communicated over a single line.…”

“…We note that a similar limitation of dynamic range applies to other distance metrics with vanishing sensitivity near the zero crossover point as well, the popular mean square error (MSE) formulation in particular. The MSE metric is frequently adopted in VQ implementations using strong inversion, squaring MOS circuitry [3], [5]. Due to the relatively wide flat region of the MSE distance function near the origin, it fails to discriminate subtle differences between templates which are more pronounced with a MAD metric.…”

Low-Power Analog Associative Processors Employing Resonance-Type Current-Voltage Characteristics

“…In this regard, various distancecalculating circuits, which are used to evaluate the similarity (or dissimilarity) between two vectors, have been proposed. Euclidean distance circuits (Tuttle et al, 1993) utilizing MOSFET square-law cells were employed in an 8-bit parallel analog vector quantization (VQ) chip. Konda et al (1996) and Cauwenberghs & Pedroni (1997) proposed neuron MOSFET (νMOS)-based and charged-based Manhattan-distance evaluation cells, respectively.…”