Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique

Abstract

In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 s, the fall time < 1.5 s and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel. M1 M2 M14 M3 M6