2022
DOI: 10.1149/2162-8777/ac4d82
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Ambipolarity Suppression of a Double Gate Tunnel FET using High-k Drain Dielectric Pocket

Abstract: We investigated the impact of placing a high-k dielectric pocket (DP) region in the drain of a double gate silicon TFET. The sheer existence of the high-k DP significantly reduces the ambipolarity due to the higher effective tunneling width at the channel/drain interface. The electrical performance investigation has been carried out by positioning the DP asymmetrically (Top or Bottom) and symmetrically on both sides of the drain. The Asymmetric DPTop configuration with an optimized thickness of 8 nm and length… Show more

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Cited by 11 publications
(5 citation statements)
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“…Several effective engineering techniques have been implemented recently to suppress ambipolarity and increase the ON current of TFETs. [24][25][26] TFET with Si 1−x Ge x source has been acknowledged as a viable alternative in complementary digital circuits and low-power applications because of its improved I ON and better I ON /I Amb ratio. 24,25 In this paper, we have presented an n-type single gate TFET with a lower bandgap Si 0.6 Ge 0.4 source to improve the drain current.…”
mentioning
confidence: 99%
“…Several effective engineering techniques have been implemented recently to suppress ambipolarity and increase the ON current of TFETs. [24][25][26] TFET with Si 1−x Ge x source has been acknowledged as a viable alternative in complementary digital circuits and low-power applications because of its improved I ON and better I ON /I Amb ratio. 24,25 In this paper, we have presented an n-type single gate TFET with a lower bandgap Si 0.6 Ge 0.4 source to improve the drain current.…”
mentioning
confidence: 99%
“…Due to its interband tunneling current transfer mechanism, the device has been getting attracted by researchers in the last decade [5]. Recently, structural modification and material selection are the critical parameters for developing TFET technology [6][7][8][9].…”
Section: Introductionmentioning
confidence: 99%
“…Ambipolarity degrades device performance and is the current conduction for negative gate voltage at a constant positive drain voltage. Researchers have considered different methods to lessen ambipolarity, including work function modulation, 22 dielectric engineering, 23 spacer technology, 24 and gate-drain underlap approach. 25 These strategies offer a greater tunneling distance and a smaller electric field at the channel/drain (C/D) interface, due to which the ambipolar current reduces.…”
mentioning
confidence: 99%