Altitude and Underground Real-Time SER Characterization of CMOS 65 nm SRAM

Abstract

8th European Workshop on Radiation Effects on Components and Systems, Univ Jyvaskyla, Dept Phys, Jyvaskyla, FINLAND, SEP 10-12, 2008International audienceWe report real-time SER characterization of CMOS 65 nm SRAM memories in both altitude and underground environments. Neutron and alpha-particle SERs are compared with data obtained from accelerated tests and values previously measured for CMOS 130 nm technology

Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level

“…For the cave experiment and due now to a very satisfactory statistics (with respect to the first results published in 2009, see Ref. [15]), 51 events were recorded, corresponding to 38 SBU and 13 MCU with multiplicities of 2-5. The fraction of MCU is found equal in this case to 13/51 ffi 25.5% of the detected events and to 36/74 = 48.6% of the total number of detected bit flips.…”

“…Both 130 nm and 65 nm bitcells were fully modeled with 3D TCAD tools (Sentaurus Synopsys package [31]) to evaluate their sensitivity to heavy ions and to determine the SEU/SBU and MBU/ MCU occurrences as a function of ion parameter [32][33][34]. In complement to TCAD work, numerous experimental studies were conducted these four last years to characterize the different test chips from an accelerated-test point-of-view with neutrons at the Los Alamos Neutron Science Center (LANSCE), as well as with an intense Am 241 alpha source at STMicroelectronics [14,15].…”

“…Two different SER test equipments, specially designed for the study, have been developed and assembled by Bertin Technologies (Aix-en-Provence, France) for the 130 nm devices [14][15][16] and by iRoC Technologies (Grenoble, France) for the 65 nm ones [17], respectively. Fig.…”

“…[18,35]. A special test algorithm used for SRAM testing [15] has been developed in complement to hardware aspects to detect and discriminate SBU from MCU, Single-Event Functional Interrupt (SEFI) or Single-Event Latchup (SEL) events. Current consumption of all power lines provided by the tester is monitored and logged during the test.…”

“…In this context, the present work surveys our 2005-2010 experiments and modeling-simulation works [12][13][14][15][16][17] dedicated to the evaluation of natural radiation-induced soft errors in advanced static memory (SRAM) technologies following a real-time (i.e. life testing) approach.…”