Almost-Nonvolatile IGZO-TFT-Based Near-Sensor In-Memory Computing

Abstract

In the era of Intelligent IoT, huge amount of sensor data is collected and then transmitted to processor elements in edge devices or cloud servers. The latency and energy consumption in this process have been a bottleneck and are becoming more severe. To mitigate this problem, the idea of combining sensors, memory and processors for collectively handling the data, has been proposed and explored actively in recent efforts. In this work, thin-film transistor (TFT), which has been widely adopted in display devices and flexible sensors, is exploited. It is shown that, while TFT is promising for nearsensor processing architecture, it also shows a great potential for computing and storage for large-area and low-cost edge sensors. More specifically, we propose an almost-nonvolatile near-sensor computing-in-memory (CiM) array based on indium-galliumzinc-oxide (IGZO) TFT, and further, integrate the CiM array with a sensor array to be a sensing and data pre-process system. We show that such a TFT-based solution can accomplish realtime sensing and multiply-and-accumulate (MAC) processing in the analog field, which simplifies the system design with lowered energy and latency in our neural network evaluations.

Computing-in-memory with thin-filmtransistors: challenges and opportunities

“…Also, the simplified readout timing and peripherals reduce the errors caused by the uncertainty and deviation of controls. With the evaluation of Monte Carlo simulation, fourbit signed weight with no overlap between states and high multiplication linearity with R factors larger than 0.999 is obtained [65].…”

“…Compared to traditional edge processing flow in which a highprecision ADC is placed directly after the sensor, the near-sensor CiM architecture eliminates the heavy cost of A/D conversion, which is also friendly for constructing pure-TFT-based processing flow where ADC is difficult to design due to the large device variation. The comparison results of BNN processing show 3.17× and 9.57× latency and energy efficiency improvement, respectively, over the CMOS all-digital processing core [65]. However, the parallelism is still limited by the readout interface of the sensor array, where full connection is not feasible for a large-size array, and the connection method such as kernel-data readout can be further explored for better trade-off between parallelism and routing complexity under a specified algorithm [76].…”

“…Looking forward to a pure-TFT-based CiM solution, simple and robust computing is considered. The work in [65] proposes a current-domain CiM array based on IGZO TFT as described in figure 5(b), with long-retention storage and high-precision MAC operation. Different from the design in [64], the multiplication exploits the linear region operation and the differential current output.…”

“…Previous work [65] has proposed a near-sensor CiM processing architecture with sensor array, as shown in figure 8. The inputs of CiM are connected to the sensor array through a scheduler, which matches the scanning behavior of the readout method by flexible selection of rows enabled by SWL controls.…”

“…Second, better peripheral circuit support for CiM is needed, emphasizing the robustness to process variations with a large number of repeated units. Third, higher energy efficiency and computing linearity for the CiM operation can be further explored, where existing methods include the exploitation of low-power dynamic memory [64,65,[68][69][70] and DC-power-free operations [87].…”