All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications

Abstract

In this paper, the most suited analog-to-digital (A/D) converters (ADCs) for Internet of Things (IoT) applications are compared in terms of complexity, dynamic performance, and energy efficiency. Among them, an innovative hybrid topology, a digital–delta (Δ) modulator (ΔM) ADC employing noise shaping (NS), is proposed. To implement the active building blocks, several standard-cell-based synthesizable comparators and amplifiers are examined and compared in terms of their key performance parameters. The simulation results of a fully synthesizable Digital-ΔM with NS using passive and standard-cell-based circuitry show a peak of 72.5 dB in the signal-to-noise and distortion ratio (SNDR) for a 113 kHz input signal and 1 MHz bandwidth (BW). The estimated FoMWalden is close to 16.2 fJ/conv.-step.

A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier

“…Researchers have recently concentrated on optimizing and improving novel layout strategies in an effort to find a way to automate the design flow of analog blocks. These strategies include the automatic place and route strategies for standardcell based circuits, which are typically used in the digital design flow to implement fully-synthesizable comparators [42], ADCs [56], DACs [57], LDOs [58], filters [59], and OTAs [60] for both IoT and biomedical applications. The goal is to speed up design time and drastically reduce the area and power consumption of analog building blocks implemented in the design flow of systems on chip (SoCs) for IoT and biomedical applications.…”

A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow

“…In this design approach, all circuit building blocks are implemented through standard-cells taken from the digital library and coded in a hardware description language, which can then be synthesized from commercial standard-cell libraries and automatically placed and routed using electronic design automation (EDA) tools. Compared to conventional analog implementations, standard-cell-based analog implementations significantly shorten the design time and cost [20][21][22][23][24][25][26][27][28][29][30][31][32].…”

Ultra-Low-Power ICs for the Internet of Things

“…A method to reduce the cost is to minimize the use of a manual design process and maximize the use of a digital (automated) design flow so that the design is transferable across technological nodes. A digital-in-concept design also allows the scale of the supply voltage and offers a performance-power consumption trade-off [1][2][3][4]. In particular, a two-stage inverter-based operational transconductance amplifier (OTA) using rail-to-rail output operating with a supply voltage of 0.5 V is presented in [1].…”

“…In [3], a novel fully standard-cell-based common-mode feedback (CMFB) loop to improve the CMRR and to stabilize the DC output voltage of pseudo-differential standard-cell-based amplifiers is proposed. To further explore complexity, dynamic performance, and energy efficiency, a fully synthesizable digital-delta (∆) modulator (∆M) ADC with noise shaping using passive components (i.e., integrated capacitors and resistors) and standard-cell-based amplifiers is presented in [4].…”