Algorithms for large-scale flat placement

Vygen, Jens

doi:10.1145/266021.266360

Cited by 76 publications

(109 citation statements)

References 6 publications

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“…Clique model were used in Refs. [20], [21]. In star model, an extra dummy node (the star) is created and every pin in the net is connected to it ( Fig.…”

Section: Lower Bound-quadratic Placementmentioning

confidence: 99%

Placement: From Wirelength to Detailed Routability

Chow

Young

2016

IPSJ Transactions on System LSI Design Methodology

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“…Clique model were used in Refs. [20], [21]. In star model, an extra dummy node (the star) is created and every pin in the net is connected to it ( Fig.…”

Section: Lower Bound-quadratic Placementmentioning

confidence: 99%

Placement: From Wirelength to Detailed Routability

Chow

Young

2016

IPSJ Transactions on System LSI Design Methodology

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“…With the number of pins denoted by P , a common weight for the clique net model is 1/P in order to adapt its cost function to the star net model [21], [32]. For additional linearization Vygen et al [33] use a net weight of 1/(P − 1) and Kleinhans et al [19] set the net weight to 2/P . These approximation techniques express linear netlength in a quadratic cost function in a heuristical manner [29].…”

Section: (3) Analytical Approachesmentioning

confidence: 99%

Fast and Robust Quadratic Placement Combined with an Exact Linear Net Model

Spindler¹,

Johannes²

2006

2006 IEEE/ACM International Conference on Computer Aided Design

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Abstract-This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distributes the modules on the chip in force-directed quadratic placement is separated into two forces: hold force and move force. Both of these forces are determined without any heuristics. Based on this novel systematic force implementation, we show that our iterative placement algorithm converges to an overlapfree placement. In addition, engineering change order (ECO) is efficiently supported by our placer. To handle the important trade-off between CPU time and placement quality, a deterministic quality control is presented.In addition, a new linear net model is proposed, which accurately models the half-perimeter wirelength (HPWL) in the quadratic cost function of quadratic placement. HPWL in general is a linear metric for netlength and represents an efficient and common estimation for routed wirelength. Compared with the classical clique net model, our linear net model reduces memory usage by 75%, CPU time by 23% and netlength by 8%, which is measured by the HPWL of all nets.Using the ISPD-2005 benchmark suite for comparison, our placer combined with the new linear net model has just 5.9% higher netlength but is 16× faster than APlace, which offers the best netlength in this benchmark. Compared to Capo, our placer has 9.2% lower netlength and is 5.4× faster.In the recent ISPD-2006 placement contest, in which quality is mainly determined by netlength and CPU time, our placer together with the new net model produced excellent results.

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“…These algorithms apply various approaches including analytical placement [6]- [13], simulated annealing [14], [15], and partitioning/clustering [16]- [18]. Analytical placement is a very promising approach for fast placement algorithm design.…”

Section: Introductionmentioning

confidence: 99%

“…As a result, analytical placement algorithms are relatively efficient in handling large problems. They typically employ a flat methodology so as to maintain a global view of the placement problem [7]- [11], [13]. For simulated annealing and partitioning/clustering based approaches, a hierarchical methodology is almost always employed…”

Section: Introductionmentioning

confidence: 99%

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FastPlace: efficient analytical placement using cell shifting, iterative local refinement,and a hybrid net model

Viswanathan

Chu

2005

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

183

212

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Abstract-In this paper, we present FastPlace -a fast, iterative, flat placement algorithm for large-scale standard cell designs. FastPlace is based on the quadratic placement approach. The quadratic approach formulates the wirelength minimization problem as a convex quadratic program that can be solved efficiently by some analytical techniques. However it suffers from some drawbacks. First, the resulting placement has a lot of overlap among cells. Second, the resulting total wirelength may be long as the quadratic wirelength objective is only an indirect measure of the linear wirelength. Third, existing net models tend to create a lot of non-zero entries in the connectivity matrix that slows down the quadratic program solver. To handle the above problems we propose: (

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Algorithms for large-scale flat placement

Cited by 76 publications

References 6 publications

Placement: From Wirelength to Detailed Routability

Placement: From Wirelength to Detailed Routability

Fast and Robust Quadratic Placement Combined with an Exact Linear Net Model

FastPlace: efficient analytical placement using cell shifting, iterative local refinement,and a hybrid net model

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