Aladin: A Layout Synthesys Tool for Analog Integrated Circuits

Abstract

This paper presents a layout synthesis tool called ALADIN for analog integrated circuits. It is developed especially for analog circuit designers who can bring their special knowledge and experience into the synthesis process to create high quality layouts. The layout generation is based on relatively complex sub-circuits rather than non-optimal single devices. A flexible module generator environment is developed for designers to write and maintain technology and application independent module generators of sub-circuits. Based on the thorough study of simulated annealing and genetic algorithm applications in the analog module placement, a genetic placement approach with simulated annealing and a very fast simulated re-annealing placement approach have been developed. A two-stage placement technique is proposed. Analog module routing consists of two phases including global routing and detailed routing. The minimum-Steiner-tree based global routing can be integrated into the placement procedure to improve the routability of placement solutions. The compaction based constructive detailed routing finally realizes the layout of the whole circuit. This tool is integrated into commercial software with convenient interfaces provided. The benefit of ALADIN providing layouts comparable to expert manual ones is demonstrated with several circuits showing its competition compared to other existing tools.

Analog Integrated Circuit Routing Techniques: An Extensive Review

“…Later, a gridless version of SALIM was proposed in [104], while in [105], hierarchical channel graphs were reported for global routing only. A channelstyle global router is used in ALADIN (2004-06) [106]- [109], where a Dijkstra shortest path algorithm is applied to solve the minimum-Steiner-tree problem. The minimum-Steiner-tree method used for net-length estimation considers the net sensitivity and channel congestion.…”

“…In order to bypass the problems of a fixed grid, a shift factors technique [115], which can control the slight shift of each unit rectangle, could be used. Many approaches use a global coarse grid for planning and an exemplary local grid for detailed routing [109] to balance the grid resolution and size. In some approaches, the grid is uniform and complete [114], while others use non-uniform [154] or tile-based [119] representing possible connections between the connection points and obstacles.…”

“…In the previously presented ILAC [97][98], a maze algorithm is used for global routing only. Maze routing is also used in the detailed routing phase of ALADIN (2004-06) [106]- [109], where a ring router [115] is firstly used to create dense wiring around the module boundary. The size of the ring depends on the number of layers used and the overlapping definition of different nets.…”

Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays in Analog Integrated Circuits

“…Several analog routers have been proposed [4], [5], [14], [23]. For specific devices and interconnects, lengthmatching requirements are commonly imposed for analog and mixed-signal designs, where the so-called length matching refers to route two or more nets such that their wire lengths are equal.…”