AIRA: A Framework for Flexible Compute Kernel Execution in Heterogeneous Platforms

Lyerly, Robert; Murray, Alastair; Barbalace, Antonio; Ravindran, Binoy

doi:10.1109/tpds.2017.2761748

Cited by 6 publications

(4 citation statements)

References 33 publications

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“…State of the Art. Traditional dynamic scheduling techniques (e.g., [5][6][7][8][9][10]) use manually tuned heuristics (e.g., fairness, shortest-job-first) that prioritize simplicity and generality over achieving the best-case workload performance. The complexity (NP-Hard) of the job shop scheduling problem limits these techniques to use these approximate heuristics, allocate coarse grained resources (e.g., GBs of memory, CPU threads) and make simplifying homogeneity assumptions about the underlying processors (i.e., all processors are same).…”

Section: Evaluation and Discussionmentioning

confidence: 99%

“…The problem of scheduling of workloads on heterogeneous processing fabrics (e.g., GPUs, FPGAs, which are becoming the norm in datacenters [1,2]), is at its core an intractable NP-hard problem [3,4]. The current scheduling approaches rely on application-and system-specific heuristics with extensive domain-expert driven tuning of scheduling policies which have to be reinvented on a case-bycase basis (e.g., [5][6][7][8][9][10][11][12][13][14][15][16][17]). This is a fundamental challenge, as variation across (i) workloads, (ii) deployments across datacenter vendors, and (iii) machine configurations inside a datacenter lead to significant time and money is spent in painstakingly building scheduling heuristics.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Inductive-bias-driven Reinforcement Learning For Efficient Schedules in Heterogeneous Clusters

Banerjee¹,

Kalbarczyk²,

Iyer³

2019

Preprint

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The problem of scheduling of workloads onto heterogeneous processors (e.g., CPUs, GPUs, FPGAs) is of fundamental importance in modern datacenters. Most current approaches rely on building application/system-specific heuristics that have to be reinvented on a case-by-case basis. This can be prohibitively expensive and is untenable going forward. In this paper, we propose a domain-driven reinforcement learning (RL) model for scheduling that can be broadly applied to a large class of heterogeneous processors. The key novelty of our approach is (i) the RL model; and (ii) the significant reduction of training-data (using domain knowledge) and -time (using sampling based end-to-end gradient propagation). We demonstrate the approach using real world GPU and FPGA accelerated applications to produce scheduling policies that significantly outperform hand-tuned heuristics.Preprint. Under review.

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Section: Evaluation and Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Inductive-bias-driven Reinforcement Learning For Efficient Schedules in Heterogeneous Clusters

Banerjee¹,

Kalbarczyk²,

Iyer³

2019

Preprint

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“…HSTREAM 32 is a high‐level parallel programming model based on OpenMP‐like compiler directives, which enables programmers to easily develop stream computing applications that can be cooperatively performed on both multi‐core CPUs and accelerators. AIRA 33 is a programming framework that supports the flexible execution of compute kernels written using standard OpenMP directives and clauses on heterogeneous CPU‐GPU platforms.…”

Section: Related Workmentioning

confidence: 99%

HeteroPP: A directive‐based heterogeneous cooperative parallel programming framework

Wan,

Cui,

et al. 2024

Concurrency and Computation

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Heterogeneous platforms composed of multiple different types of computing devices (such as CPUs, GPUs, and Intel MICs) have been widely used recently. However, most of parallel applications developed in such a heterogeneous platform usually only utilize a certain kind of computing device due to the lack of easy‐to‐use heterogeneous cooperative parallel programming models. To reduce the difficulty of heterogeneous cooperative parallel programming, a directive‐based heterogeneous cooperative parallel programming framework called HeteroPP is proposed. HeteroPP provides an easier way for programmers to fully exploit multiple different types of computing devices to concurrently and cooperatively perform data‐parallel applications on heterogeneous platforms. An extension to OpenMP directives and clauses is proposed to make it possible for programmers to easily offload a data‐parallel compute kernel to multiple different types of computing devices. A source‐to‐source compiler is designed to help programmers to automatically generate multiple device‐specific compute kernels that can be concurrently and cooperatively performed on heterogeneous platforms. Many experiments are conducted with 12 typical data‐parallel applications implemented with HeteroPP on a heterogeneous CPU‐GPU‐MIC platform. The results show that HeteroPP not only greatly simplifies the heterogeneous cooperative parallel programming, but also can fully utilize the CPUs, GPU, and MIC to efficiently perform these applications.

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“…AIRA [37] targets C/OpenMP applications and automatically instruments the source code to generate executables for CPUs and GPUs. The applications are analyzed offline in order to help an allocation policy to decide which architecture provides better performance.…”

Section: Related Workmentioning

confidence: 99%

Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs

Horta,

Chuang,

VSathish

et al. 2021

Preprint

Self Cite

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Datacenter servers are increasingly heterogeneous: from x86 host CPUs, to ARM or RISC-V CPUs in NICs/SSDs, to FPGAs. Previous works have demonstrated that migrating application execution at run-time across heterogeneous-ISA CPUs can yield significant performance and energy gains, with relatively little programmer effort. However, FPGAs have often been overlooked in that context: hardware acceleration using FPGAs involves statically implementing select application functions, which prohibits dynamic and transparent migration. We present Xar-Trek, a new compiler and run-time software framework that overcomes this limitation. Xar-Trek compiles an application for several CPU ISAs and select application functions for acceleration on an FPGA, allowing execution migration between heterogeneous-ISA CPUs and FPGAs at run-time. Xar-Trek's run-time monitors server workloads and migrates application functions to an FPGA or to heterogeneous-ISA CPUs based on a scheduling policy. We develop a heuristic policy that uses application workload profiles to make scheduling decisions. Our evaluations conducted on a system with x86-64 server CPUs, ARM64 server CPUs, and an Alveo accelerator card reveal 88%-1% performance gains over no-migration baselines.CCS Concepts: • Computer systems organization → Reconfigurable computing; Heterogeneous (hybrid) systems; High-level language architectures; • Applied computing → Data centers.

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AIRA: A Framework for Flexible Compute Kernel Execution in Heterogeneous Platforms

Cited by 6 publications

References 33 publications

Inductive-bias-driven Reinforcement Learning For Efficient Schedules in Heterogeneous Clusters

Inductive-bias-driven Reinforcement Learning For Efficient Schedules in Heterogeneous Clusters

HeteroPP: A directive‐based heterogeneous cooperative parallel programming framework

Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs

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