Advanced solid-phase crystallization for high-hole mobility (450 cm²V⁻¹s⁻¹) Ge thin film on insulator

Abstract

The hole mobility of the solid-phase-crystallized Ge layer is significantly improved by controlling the deposition temperature of Ge (50-200 °C) and the Ge thickness (50-500 nm) and by applying post annealing at 500 °C. The resulting hole mobility, 450 cm 2 /Vs, is the highest value to date among that of semiconductor layers directly formed on glass. The mechanism of the mobility enhancement is discussed from the perspective of three carrier scattering factors: grain boundary scattering, interface scattering, and impurity scattering. The high-hole mobility Ge layer formed by the simple fabrication process will be useful for high-speed thin-film transistors.

Sb-doped crystallization of densified precursor for n-type polycrystalline Ge on an insulator with high carrier mobility

“…4(b), generally, the grain size of undoped Ge decreases with increasing t. This behavior was explained as the bulk nucleation occurring in thick films while interfacial nucleation remained predominant in thin films. 31,38 These results suggest that crystallization was completed before bulk nucleation started owing to the growth rate enhancement by Sb doping. The grain size for T g ¼ 375 C approaches twice that for T g ¼ 450 C and exceeds 15 lm, the largest grain size among SPC-Ge, in the whole t range.…”

“…Figure 5(b) shows that l n for T g ¼ 375 C is slightly lower than that for T g ¼ 450 C, which is attributed to larger carrier scattering caused by more Sb segregation and/or higher E B by lower n. 40 Figure 5(c) shows that n decreases with increasing t for both T g ¼ 375 and 450 C. Although the reason is unclear, it is possible that an increase in the total amount of Sb increases the Sb segregation in Ge. Figure 5(d) shows that l n does not change significantly with respect to t. This reflects the balance between lower interface scattering due to larger t 31,38 and higher E B due to lower n [ Fig. 5(c)].…”

“…29 We recently found that the atomic density of amorphous Ge (a-Ge) significantly influenced subsequent SPC. [30][31][32] By using a densified a-Ge on a GeO 2 underlayer, we fabricated a poly-Ge layer with a hole mobility of 620 cm 2 /V s, 33 which greatly exceeds that of bulk-Si (430 cm 2 /V s). These achievements initiated the prospect of the development of inversion-type poly-Ge n-MOSFETs that surpass Si-MOSFETs.…”

“…1). This behavior is likely because the larger grain size provides the lower defect-induced acceptors 30,31 and/or the less Sb segregation at grain boundaries. Figure 3(b) shows that n is saturated at around C Sb ¼ 2.8 Â 10 20 cm À3 for each T d .…”

Dewetting behavior of Ge layers on SiO2 under annealing

“…Behavior of 10-40 nm Ge layers on SiO 2 under annealing. It was shown that low-temperature (up to 200 °C) Ge grown on SiO 2 forms polycrystalline Ge layers 40 , which remain continuous and exhibit a high hole mobility after the annealing at temperatures up to 500 °C 41 . The annealing of our samples at 550 °C and lower temperatures does not lead to the formation of three-dimensional particles.…”