Advanced heterogeneous integration of InP HBT and CMOS Si technologies for high performance mixed signal applications

Gutierrez-Aitken, A.; Chang‐Chien, P.; Phan, Wen; Scott, D.; Oyama, B.; Sandhu, R.; Zhou, Joe; Nam, P.; Hennig, Kelly; Parlee, Matthew; Poust, B.; Thai, Kerri; Geiger, Craig; Oki, A.K.; Kagiwada, R.S.

doi:10.1109/mwsym.2009.5165895

Cited by 11 publications

(5 citation statements)

References 7 publications

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“…All of the approaches are capable of supporting interconnect lengths and pitches of the order of micrometres (rather than tens of micrometres for traditional multichip assembly integration approaches). In one approach developed at Northrup Grumman [7], a wafer-scale assembly approach is used to integrate completed III-V 'chiplets' on top of a completed CMOS wafer. This approach uses 'microbumps' to interconnect two or more different device and component types with the Si CMOS.…”

Section: Chip-scale Heterogeneous Integration (A) Iii-v Devices and Si Cmosmentioning

confidence: 99%

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

Kazior

2014

Phil. Trans. R. Soc. A.

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Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

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Section: Chip-scale Heterogeneous Integration (A) Iii-v Devices and Si Cmosmentioning

confidence: 99%

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

Kazior

2014

Phil. Trans. R. Soc. A.

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“…One element of DAHI, the Compound Semiconductor Materials on Silicon (COSMOS) thrust, has demonstrated three different approaches (shown in Figure 3) to achieving InP BiCMOS integrated circuit technology featuring InP HBTs and deep submicron Si CMOS [12][13] [14] for RF and mixed signal circuits.…”

Section: Darpa Dahi Programmentioning

confidence: 99%

Materials and Integration Strategies for Modern RF Integrated Circuits

Green

Dohrman

Kane

et al. 2014

2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)

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The DARPA Microsystems Technology Office is developing revolutionary materials, devices, and integration techniques for meeting the RF integrated circuit performance requirements for advanced modern RF systems. DARPA is enabling these systems through systematic development of materials and devices, circuits, and integration technologies for compound semiconductors. The DARPA Nitride Electronic Next-Generation Technology (NEXT) program is developing high performance nitride transistors for high-speed RF, analog and mixed signal electronics, thus overcoming the Johnson figure of merit limits to achieving simultaneous high-speed operation and high breakdown voltage. The DARPA Microscale Power Conversion (MPC) program is developing nitride-based technology to enable dynamic envelope-tracking power conversion embedded in RF radiating elements. The DARPA Diverse Accessible Heterogeneous Integration (DAHI) program is developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices, as well as other emerging materials and devices, with high-density silicon CMOS technology. Taken together, these programs are addressing many of the critical challenges for next-generation RF modules and seek to revolutionize DoD capabilities in this area.

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“…One approach, pursued by a team led by Northrop Grumman Aerospace Systems, involves sub-circuit integration in which III-V device "chiplets" are assembled onto a processed CMOS wafer with high-density [9]. At the other end of the spectrum, in an approach being developed by a Raytheon-led team [10], monolithic integration methods are being explored to epitaxially grow III-Vs on CMOScompatible substrates.…”

Section: Program Objectives and Challengesmentioning

confidence: 99%

“…As previously mentioned, three innovative heterogeneous integration processes are currently being developed in COSMOS program: micrometer scale assembly [9], monolithic epitaxial growth [10], and epitaxial layer printing [11] approaches as illustrated in Fig. 1 A micrometer-scale assembly process is being developed by the team led by Northrop Grumman Aerospace Systems.…”

Section: Program Achievementsmentioning

confidence: 99%

The DARPA COSMOS program: The convergence of InP and Silicon CMOS technologies for high-performance mixed-signal

Raman

Chang

Dohrman

et al. 2010

2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)

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The COmpound Semiconductor Materials On Silicon (COSMOS) program of the U.S. Defense Advanced Research Projects Agency (DARPA) focuses on developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices with high-density silicon circuits. The technical approaches being explored in this program include high-density micro assembly, monolithic epitaxial growth, and epitaxial layer printing processes. In Phase I of the program, performers successfully demonstrated world-record differential amplifiers through heterogeneous integration of InP HBTs with commercially fabricated CMOS circuits. In the current Phase II, complex wideband, large dynamic range, high-speed digitalto-analog convertors (DACs) are under development based on the above heterogeneous integration approaches. These DAC designs will utilize InP HBTs in the critical high-speed, high-voltage swing circuit blocks and will employ sophisticated in situ digital correction techniques enabled by CMOS transistors. This paper will also discuss the Phase III program plan as well as future directions for heterogeneous integration technology that will benefit mixed signal circuit applications.

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Advanced heterogeneous integration of InP HBT and CMOS Si technologies for high performance mixed signal applications

Cited by 11 publications

References 7 publications

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

Materials and Integration Strategies for Modern RF Integrated Circuits

The DARPA COSMOS program: The convergence of InP and Silicon CMOS technologies for high-performance mixed-signal

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