“…The continued miniaturization of features in integrated circuits for the development of future technology nodes will drive the half pitch of back-end-of-line (BEOL) interconnects to <10 nm, introducing significant performance and reliability challenges [ 1 , 2 , 3 , 4 ]. Despite the advances in novel low- k dielectrics and liner layer scaling, the increase in the resistance-capacitance (RC) delay poses a serious threat to the damascene Cu extendibility, which has been the industrial standard for BEOL interconnects since its introduction in 2000 [ 5 , 6 , 7 , 8 , 9 , 10 ]. This increase in the RC delay is a direct consequence of the resistivity size effect, which is primarily attributed to electron scattering at surfaces [ 11 , 12 , 13 , 14 , 15 , 16 ] and grain boundaries [ 17 , 18 , 19 , 20 , 21 ] as the linewidths w or grain size D of nanoscale conductors approach and become smaller than the electron–phonon scattering mean free path, which is 39 nm for Cu [ 22 , 23 , 24 ].…”