Adjustable Speed Induction Motor Drive Fed by 13-Level Cascaded Inverter and 54-Pulse Converter

Singh, Bhim; Kumar, Rohit; Kant, Piyush

doi:10.1109/tia.2021.3127855

Cited by 13 publications

(6 citation statements)

References 31 publications

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“…The second term in equation ( 18) represents the total voltage drop due to the dead time on the phase voltage. It can be noted that the voltage drop in relation (18) coincides with the voltage drop in equation (11). It means that, for fixed dead time tdt, fixed switching frequency fsw and fixed total DC link voltage VDC, the total voltage drop module on CHBMI phase voltage is the same of the traditional single-phase H-Bridge.…”

Section: Dead Time Voltage Drop: Mathematical Formulation For Chbmimentioning

confidence: 79%

“…The modular structure allows for reaching high inverter output voltage and high-number of voltage levels starting by low voltage DC sources, reducing the Total Harmonic Distortion (THD) and avoiding bulky and expensive filters; in PV applications, the modular structure allows for avoiding the DC-DC conversion stage to execute the MPPT [10]. CHBMI is being adopted also in medium-voltage high-power industrial electric drives [11]. In detail, in the range of 4.16-13.8 kV, CHBMI-based electric drives result to be the most efficient, if compared with other MI topologies, regardless of the semiconductor technology.…”

Section: Introductionmentioning

confidence: 99%

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Dead-Time Impact on the Harmonic Distortion and Conversion Efficiency in a Three-Phase Five-Level Cascaded H-Bridge Inverter: Mathematical Formulation and Experimental Analysis

et al. 2023

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To avoid leg short-circuit in inverters, dead time must be introduced on leg gate signals. Dead time affects the inverter output voltage fundamental harmonic amplitude, voltage harmonic distortion and inverter efficiency by introducing additional voltage drops. In this regard, dead time effects have been widely investigated for traditional two-level three-phase voltage source inverters in the literature but not extensively for multilevel topology structures. This paper provides a detailed analysis of dead time impact on the harmonic distortion and efficiency of Cascaded H-Bridges Multilevel Inverters (CHBMIs). For this purpose, a general mathematical formulation to determine voltage drop due to dead time effects, also taking into account the adopted Multicarrier PWM strategy, has been provided and experimentally validated for a fivelevel three-phase CHBMI structure. As a comparison tool between expected and ideal inverter output voltage, the percentage voltage error e% is introduced. In most of the cases, e% is lower than 5%, and it starts increasing for very low amplitude modulation index or for specific working points where nonlinearities occur. Furthermore, several experimental investigations have been carried out to evaluate the CHBMI performance in terms of harmonic distortion and efficiency by changing, the values of dead time, modulation index and switching frequency for ten different multi-carried PWM strategies. Experimental results confirm the strong dependency between the dead time impact on the converter performance and the adopted Multi Carrier-PWM (MC-PWM) strategy: as a way of example, converter efficiency can be reduced from 80% to 60% when dead time is increased from 0.5 μs to 1.5 μs and Phase Shifted-PWM (PS-PWM) is adopted.

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Section: Dead Time Voltage Drop: Mathematical Formulation For Chbmimentioning

confidence: 79%

Section: Introductionmentioning

confidence: 99%

Dead-Time Impact on the Harmonic Distortion and Conversion Efficiency in a Three-Phase Five-Level Cascaded H-Bridge Inverter: Mathematical Formulation and Experimental Analysis

et al. 2023

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“…The rotor resistance and motor speed are represented by 𝑅 𝑟 and ω 𝑚 , respectively. The components of the stator flux vector ϕ 𝑠 can be represented as ( 6), (7), (8):…”

Section: Dynamic Modeling Of Induction Motormentioning

confidence: 99%

“…The presence of hysteresis device in the standard DTC scheme [5] is well established as the action of switch frequency changes. Several solutions have been proposed to alleviate DTC limitations, such as using artificial intelligence (AI) algorithms [6]- [8]. Several academics have proposed and developed the space vector modulation (SVM) technique to eliminate torque and flux ripples by operating the inverter at a continuous switching frequency.…”

Section: Introductionmentioning

confidence: 99%

Direct torque control and dynamic performance of induction motor using fractional order fuzzy logic controller

Kamalapur¹

2023

IJECE

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<p><span lang="EN-US">Conventional direct torque control (DTC) is one of the best control systems for regulating the torque of an induction motor (IM). However, the DTC’s enormous waves in flux and torque cause acoustic noise that degrades control performance, especially at low speeds due to the DTC’s low switching frequency. Direct torque control systems, which focus just on torque and flux, have been proposed as a solution to these problems. In order to improve DTC control performance, this work introduces a fractional-order fuzzy logic controller method. The objective is to analyze this technique critically with regard to its efficacy in reducing ripple, its tracking speed, its switching loss, its algorithm complexity, and its sensitivity to its parameters. Simulation in MATLAB/Simulink verifies the anticipated control approach’s performance.</span></p>

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“…Along with the lower value of total harmonic distortion (THD), MLIs can achieve a high‐power rating and thereby be used in High Voltage DC (HVDC) and renewable energy harvesting applications 3,4 . Some additional applications of MLIs are marine traction systems, 5 electric vehicle technology, 6 industrial drive systems, 7 and flexible ac transmission systems (FACTS) devices 8 . The conventional MLIs can be categorized into three types: cascaded H‐bridge inverters, neutral point clamped (NPC) inverters, and flying capacitor inverters.…”

Section: Introductionmentioning

confidence: 99%

An NPC‐type fault‐tolerant MLI with symmetrical and asymmetrical voltage modes

Kumar

Peddapati

2023

Circuit Theory & Apps

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SummaryCurrent studies have been challenging in reducing the number of devices and ensuring fault tolerance features of the multilevel inverters (MLIs). This article proposes a new fault‐tolerant neutral point clamped (NPC)‐type MLI using two three‐level NPC legs, which can work in symmetric and asymmetric modes to generate nine and 17‐level output voltage, respectively. The proposed converter has less device count and low total blocking voltage (TBV); further, the converter has different redundant switching states for tolerating different categories of faults. This article also implements a modified pulse width modulation (PWM) control strategy to ensure the zero‐dc offset at the output when asymmetrical voltage levels appear with the occurrence of switch faults. A detailed operation of the proposed converter under symmetric and asymmetric modes is presented for healthy and different categories of faults. The converter's feasibility is verified by its current and voltage characteristics obtained from the MATLAB‐SIMULINK software and the experimental prototype. Further, the efficiency of the converter is verified with the PLECS software. Finally, a comparison with recently proposed topologies is performed to emphasize converter performance.

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Adjustable Speed Induction Motor Drive Fed by 13-Level Cascaded Inverter and 54-Pulse Converter

Cited by 13 publications

References 31 publications

Dead-Time Impact on the Harmonic Distortion and Conversion Efficiency in a Three-Phase Five-Level Cascaded H-Bridge Inverter: Mathematical Formulation and Experimental Analysis

Dead-Time Impact on the Harmonic Distortion and Conversion Efficiency in a Three-Phase Five-Level Cascaded H-Bridge Inverter: Mathematical Formulation and Experimental Analysis

Direct torque control and dynamic performance of induction motor using fractional order fuzzy logic controller

An NPC‐type fault‐tolerant MLI with symmetrical and asymmetrical voltage modes

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