Adjoint Optimization of Efficient CMOS-Compatible Si-SiN Vertical Grating Couplers for DWDM Applications

Hooten, Sean; Vaerenbergh, Thomas Van; Sun, Peng; Mathai, S.; Huang, Zhihong; Beausoleil, Raymond G.

doi:10.1109/jlt.2020.2969097

Cited by 18 publications

(24 citation statements)

References 42 publications

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“…The refractive index of SiN x is approximately 2.03, which is slightly lower than that of GaN (2.29). However, SiN x is more conducive to CMOS processing [179,180]. This characteristic gives SiN-based metasurfaces the potential for mass production.…”

Section: Sin-based Metasurfacesmentioning

confidence: 99%

Review of Metasurfaces and Metadevices: Advantages of Different Materials and Fabrications

et al. 2022

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Flat optics, metasurfaces, metalenses, and related materials promise novel on-demand light modulation within ultrathin layers at wavelength scale, enabling a plethora of next-generation optical devices, also known as metadevices. Metadevices designed with different materials have been proposed and demonstrated for different applications, and the mass production of metadevices is necessary for metadevices to enter the consumer electronics market. However, metadevice manufacturing processes are mainly based on electron beam lithography, which exhibits low productivity and high costs for mass production. Therefore, processes compatible with standard complementary metal–oxide–semiconductor manufacturing techniques that feature high productivity, such as i-line stepper and nanoimprint lithography, have received considerable attention. This paper provides a review of current metasurfaces and metadevices with a focus on materials and manufacturing processes. We also provide an analysis of the relationship between the aspect ratio and efficiency of different materials.

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Section: Sin-based Metasurfacesmentioning

confidence: 99%

Review of Metasurfaces and Metadevices: Advantages of Different Materials and Fabrications

et al. 2022

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“…In recent years, novel design methodologies based on inverse design and machine learning have been proposed to reduce coupling losses in GCs while respecting fabrication constraints present in, e.g. available deep ultra violet (DUV) lithography process flows [7][8][9][10][11][12][13][14]. Interestingly, these more advanced design techniques facilitate the usage of more degrees of freedom in the design, allowing designers to go beyond traditional single-layer, single-etch designs and leverage dual etch [10,[14][15][16][17][18][19][20][21], dual layer fabrication flows [7,11,[22][23][24][25].…”

Section: Introductionmentioning

confidence: 99%

“…available deep ultra violet (DUV) lithography process flows [7][8][9][10][11][12][13][14]. Interestingly, these more advanced design techniques facilitate the usage of more degrees of freedom in the design, allowing designers to go beyond traditional single-layer, single-etch designs and leverage dual etch [10,[14][15][16][17][18][19][20][21], dual layer fabrication flows [7,11,[22][23][24][25]. Additionally, reduction in the minimal feature size would allow the usage of sub-wavelength (SWL) features [19,20,[26][27][28], although not all recent SWL designs are compatible with the constraints of scalable DUV immersion lithography [26].…”

Section: Introductionmentioning

confidence: 99%

“…In this paper, we apply advanced design techniques to GC design in an emerging hybrid c-Si/SiN layer stack [29][30][31][32][33][34][35]. Specifically, we investigate perfectly vertical GCs as the 0 deg coupling might simplify the mechanical design of single-mode connectors in datacom or HPC interconnects [3,11]. Here, we will leverage our previous theory paper [11] which showed how a SiN-layer can improve coupling efficiency (and reduce reflection) over a pure c-Si vertical GC design.…”

Section: Introductionmentioning

confidence: 99%

“…Specifically, we investigate perfectly vertical GCs as the 0 deg coupling might simplify the mechanical design of single-mode connectors in datacom or HPC interconnects [3,11]. Here, we will leverage our previous theory paper [11] which showed how a SiN-layer can improve coupling efficiency (and reduce reflection) over a pure c-Si vertical GC design. We will then validate the previously proposed designs, which were obtained using inverse design, and compare them with alternative adjoint-inspired designs, which we proposed in our prior work on single-layer, single-etch c-Si GCs discussed in [36], but adapt in this paper to dual layer designs.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Wafer-level testing of inverse-designed and adjoint-inspired dual layer Si-SiN vertical grating couplers

Vaerenbergh¹,

Hooten

Jain

et al. 2022

J. Phys. Photonics

Self Cite

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Recently, silicon photonics foundries started providing access to new dielectric stacks which can be utilized to reduce optical I/O losses. For example, in a hybrid c-Si/SiN platform, inverse design techniques can be used to create novel dual layer grating coupler (GC) designs which, in simulations, reach state-of-the-art performance. In this paper, we experimentally validate such designs for perfectly vertical single-polarization GCs in the O-band consisting of a single-etch c-Si layer with a patterned SiN overlay, fabricated using a 193nm DUV immersion lithography process on 300mm wafers. Here, we investigate designs generated by two different design paradigms: inverse design based on the adjoint method and adjoint-inspired design. Using wafer-level testing, we experimentally demonstrate a record low median insertion loss (IL) of 1.3 dB (with interquartile range of ∼ 0.1 − 0.2 dB) for perfectly vertical coupling in DUV lithography compatible devices which is a ∼ 0.5 dB improvement over previously demonstrated single-layer, single-etch c-Si 0 deg GCs.

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Automatic Differentiation Accelerated Shape Optimization Approaches to Photonic Inverse Design in FDFD/FDTD

Hooten,

Sun,

Gantz

et al. 2024

Laser & Photonics Reviews

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Shape optimization approaches to inverse design offer low‐dimensional, physically‐guided parameterizations of structures by representing them as combinations of primitives. However, on fixed grids, computing the gradient of a user objective via the adjoint variables method requires a product of forward/adjoint field solutions and the Jacobian of the simulation material distribution with respect to the structural shape parameters. Shape parameters often perturb global parts of the simulation grid resulting in many non‐zero Jacobian entries. These are often computed by finite‐difference (FD) in practice, and hence can be non‐trivial. In this work, the gradient calculation is accelerated by invoking automatic differentiation (AD) in instantiations of structural material distributions, enabled by the development of extensible differentiable feature‐mappings from parameters to primitives and differentiable effective logic operations (denoted AutoDiffGeo or ADG). ADG can also be used to accelerate FD‐based shape optimization by efficient boundary selection. AD‐enhanced shape optimization is demonstrated using three integrated photonic examples: a blazed grating coupler, a waveguide transition taper, and a polarization‐splitting grating coupler. The accelerations of the gradient calculation by AD relative to FD with boundary selection exceed 10, resulting in total optimization wall time accelerations of – on the same hardware with no compromise to device figure‐of‐merit.

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Adjoint Optimization of Efficient CMOS-Compatible Si-SiN Vertical Grating Couplers for DWDM Applications

Cited by 18 publications

References 42 publications

Review of Metasurfaces and Metadevices: Advantages of Different Materials and Fabrications

Review of Metasurfaces and Metadevices: Advantages of Different Materials and Fabrications

Wafer-level testing of inverse-designed and adjoint-inspired dual layer Si-SiN vertical grating couplers

Automatic Differentiation Accelerated Shape Optimization Approaches to Photonic Inverse Design in FDFD/FDTD

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