Adiabatic 5T SRAM

Samson, Mamatha; Mandavalli, Satyam

doi:10.1109/ised.2011.57

Cited by 4 publications

(2 citation statements)

References 17 publications

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“…As noted earlier, memory and data transfer is one of the primary sources of power dissipation in a traditional digital computer [26]. Because of this, the authors of [44] chose to demonstrate the feasibility of using charge recovery computing for memory circuits. Their adiabatic implementation of a 5T SRAM cell showed impressive savings in power dissipation, though it did come at the cost of increased write times [44].…”

Section: Adiabatic Computingmentioning

confidence: 99%

“…Because of this, the authors of [44] chose to demonstrate the feasibility of using charge recovery computing for memory circuits. Their adiabatic implementation of a 5T SRAM cell showed impressive savings in power dissipation, though it did come at the cost of increased write times [44]. Adiabatic logic can also be used to implement other sequential logic elements, as demonstrated in [45].…”

Section: Adiabatic Computingmentioning

confidence: 99%

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Survey of Novel Architectures for Energy Efficient High-Performance Mobile Computing Platforms

O’Connor,

Elfouly,

Alouani

2023

Energies

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There are many real-world applications that require high-performance mobile computing systems for onboard, real-time processing of gathered data due to latency, reliability, security, or other application constraints. Unfortunately, most existing high-performance mobile computing systems require a prohibitively high power consumption in the face of the limited power available from the batteries typically used in these applications. For high-performance mobile computing to be practical, alternative hardware designs are needed to increase the computing performance while minimizing the required power consumption. This article surveys the state-of-the-art in high-efficiency, high-performance onboard mobile computing, focusing on the latest developments. It was found that more research is needed to design high-performance mobile computing systems while minimizing the required power consumption to meet the needs of these applications.

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Section: Adiabatic Computingmentioning

confidence: 99%

Section: Adiabatic Computingmentioning

confidence: 99%

Survey of Novel Architectures for Energy Efficient High-Performance Mobile Computing Platforms

O’Connor,

Elfouly,

Alouani

2023

Energies

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Low power adiabatic logic based on FinFETs

Liao

Cui

Liao

et al. 2014

Sci. China Inf. Sci.

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Theory, Synthesis, and Application of Adiabatic and Reversible Logic Circuits for Security Applications

Morrison

2014

2014 IEEE Computer Society Annual Symposium on VLSI

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To my parents, Alfred and Kathleen Morrison, and to my grandparents, Arthur and Betty Kempf, and Alfred and Dorothy Morrison, for making all the opportunities I have possible. ACKNOWLEDGMENTS I would like to thank my advisor, Dr. Nagarajan Ranganathan, for giving me the opportunity to pursue my research, and for his valuable guidance and assistance over these last four years. Ranga has always been an excellent motivator, guider, and leader, and completion of this project would not have been possible without his patience and belief in my ideas. I want to

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Adiabatic 5T SRAM

Cited by 4 publications

References 17 publications

Survey of Novel Architectures for Energy Efficient High-Performance Mobile Computing Platforms

Survey of Novel Architectures for Energy Efficient High-Performance Mobile Computing Platforms

Low power adiabatic logic based on FinFETs

Theory, Synthesis, and Application of Adiabatic and Reversible Logic Circuits for Security Applications

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