Addressing future analytical requirements of electronic materials

Abstract

The drive toward faster, denser, cheaper, lower power consuming and more reliable semiconductor products is predicted to continue relentlessly toward the end of the next decade, with a new generation introduced every three years. This is achieved by reducing horizontal and vertical device geometries, and by introducing more sophis ticated device structures. While these developments move at a fast pace, industries focus on rapid yield learning to reduce development costs. The key to fast process control and defect reduction is the implementation of efficient analytical and simu lation tools. After discussing trends in memory and logic, this paper focuses on key elements of CMOS structures and on characterization needs for successful develop ment of future technologies.